Hitachi H8S/2628 Hardware Manual page 27

(Example with 8-Bit Data, Multiprocessor Bit, One Stop Bit) ..............................329
Figure 14.13 Sample Multiprocessor Serial Reception Flowchart (1) ........................................330
Figure 14.13 Sample Multiprocessor Serial Reception Flowchart (2) ........................................331
Figure 14.14 Data Format in Synchronous Communication (For LSB-First).............................332
Figure 14.15 Sample SCI Initialization Flowchart .....................................................................333
Figure 14.16 Sample SCI Transmission Operation in Clocked Synchronous Mode ..................334
Figure 14.17 Sample Serial Transmission Flowchart .................................................................335
Figure 14.18 Example of SCI Operation in Reception ...............................................................336
Figure 14.19 Sample Serial Reception Flowchart.......................................................................337
Figure 14.20 Sample Flowchart of Simultaneous Serial Transmit and Receive Operations.......339
Figure 14.21 Schematic Diagram of Smart Card Interface Pin Connections..............................340
Figure 14.22 Normal Smart Card Interface Data Format............................................................341
Figure 14.23 Direct Convention (SDIR = SINV = O/E = 0) ......................................................341
Figure 14.24 Inverse Convention (SDIR = SINV = O/E = 1).....................................................342
Figure 14.25 Receive Data Sampling Timing in Smart Card Mode
(Using Clock of 372 Times the Transfer Rate)......................................................343
Figure 14.26 Retransfer Operation in SCI Transmit Mode.........................................................345
Figure 14.27 TEND Flag Generation Timing in Transmission Operation..................................346
Figure 14.28 Example of Transmission Processing Flow...........................................................347
Figure 14.29 Retransfer Operation in SCI Receive Mode ..........................................................348
Figure 14.30 Example of Reception Processing Flow ................................................................349
Figure 14.31 Timing for Fixing Clock Output Level..................................................................349
Figure 14.32 Clock Halt and Restart Procedure..........................................................................350
Section 15 Hitachi Controller Area Network (HCAN)
Figure 15.1 HCAN Block Diagram ............................................................................................356
Figure 15.2 Message Control Register Configuration ................................................................380
Figure 15.3 Standard Format ......................................................................................................380
Figure 15.4 Extended Format .....................................................................................................380
Figure 15.5 Message Data Configuration ...................................................................................382
Figure 15.6 Hardware Reset Flowchart ......................................................................................385
Figure 15.7 Software Reset Flowchart........................................................................................386
Figure 15.8 Detailed Description of One Bit ..............................................................................387
Figure 15.9 Transmission Flowchart ..........................................................................................390
Figure 15.10 Transmit Message Cancellation Flowchart............................................................392
Figure 15.11 Reception Flowchart..............................................................................................394
Figure 15.12 Unread Message Overwrite Flowchart ..................................................................396
Figure 15.13 HCAN Sleep Mode Flowchart...............................................................................398
Figure 15.14 HCAN Halt Mode Flowchart ................................................................................400
Figure 15.15 DTC Transfer Flowchart .......................................................................................402
Figure 15.16 High-Speed Interface Using PCA82C250 .............................................................403
Section 16 Synchronous Serial Communication Unit (SSU)
Rev. 1.0, 09/02, page xxv of xxxiv