Fig. 2.21 Time-Base Timer Block Diagram; Time-Base Timer - Fujitsu MB89140 Series Hardware Manual

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TIME-BASE TIMER

TBTC*
Submode control signal
* TBTC is a clock pulse with 1/2 oscillation of the original oscillation.
HARDWARE CONFIGURATION
2.7 TIME-BASE TIMER
This timer has a 21-bit binary counter and uses a clock pulse with 1/2 os-
cillation of the main clock.
Four interval times can be selected.
This function cannot be used when the main clock is stopped.
The clock source of this timer does not change even with a gear change
(1/2 oscillation frequency).
Block Diagram
0
1
2
1/2
10
11
12
1/2
TBC0
TBC1
TBR
TBIE
TBIF

Fig. 2.21 Time-base Timer Block Diagram

Register list
The time-base timer has time-base timer control register (TBCR).
Address: 000A
H
2-41
3
4
5
6
7
21-bit counter
13
14
15
16
17
MPX
Interrupt request
IRQA
8 bit
TBCR
R/W Time-base timer control register
8
9
18
19
20

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