R&S AFQ100A Operating Manual page 249

R&S AFQ100A
Status Reporting System
The status reporting system (cf. Figure 5-2
errors which have occurred. This information is stored in the error queue. The the error queue can be
queried via IEC/IEEE bus or via the Ethernet.
The information is of a hierarchical structure. The register status byte (STB) defined in IEEE 488.2 and
its associated mask register service request enable (SRE) form the uppermost level. The STB receives
its information from the standard event status register (ESR) which is also defined in IEEE 488.2 with
the associated mask register standard event status enable (ESE).
The IST flag ("Individual STatus") and the parallel poll enable register (PPE) allocated to it are also part
of the status reporting system. The IST flag, like the SRQ, combines the entire instrument status in a
single bit. The PPE fulfills an analog function for the IST flag as the SRE for the service request.
The output buffer contains the messages the instrument returns to the controller. It is not part of the
status reporting system but determines the value of the MAV bit in the STB.
Overview of the Status Register
The following figure shows the status registers used in the R&S AFQ.
SRQ
RQS/MSS
-&-
ESB
-&-
MAV
-&-
STB
SRE
Error Queue Output Buffer
-&-
-&-
-&-
-&-
& = logical AND
= logical OR
PPE
of all bits
IS Tflag
(response to parallel poll)
Figure 5-2 Overview of status registers
1401.3084.32
Overview of status registers) stores all information on
-&- Power on
7
-&- User Request
6
-&- Command Error
5
-&- Execution Error
4
Device Dependent Error
-&- 3
Query Error
-&- 2
Request Control
-&- 1
-&- 0
Operation Complete
ESE ESR
5.26
Status Reporting System
E-3