R&S AFQ100A Operating Manual page 176

R&S AFQ100A
The output clock source and frequency are set in the Clock section.
Note:
The section Clock section is displayed only if PORT2 is activated.
Clock (Interface clock
= memory clock)
Slope - Digital Output
1401.3084.32
(Port 2 only)
For configuring the clock settings see section
4.31.
(Port2 only)
Sets the polarity of the active clock for triggering digital signal
transmission via Port2. Clock and data are in phase. Either the rising
or the falling edge of the data clock can be selected. .
The rising edge of the clock signal is active.
Positive
Remote-control commands:
SOUR:OUTP:DIG:CLOC:SLOP POS
The falling edge of the clock signal is active.
Negative
Remote-control commands:
SOUR:OUTP:DIG:CLOC:SLOP NEG
4.65
Output Block
Clock Dialog, on page
E-3