Pst (Pulse Stretcher); Rsr (Rs Flip-Flop, Reset Dominant) - Siemens Sinamics S110 Function Manual

7.3.8.16

PST (pulse stretcher)

Brief description
Timer for generating a pulse with a minimum duration and an additional reset input
Mode of operation
The rising edge of a pulse at input I sets output Q to 1.
Output Q does not return to 1 until input pulse I is 0 and pulse duration T has expired.
Output Q can be set to zero at any time via reset input R with R = 1.
Time flow chart
Output pulse Q as a function of pulse duration T and input pulse I (when R = 0).
1
I
0
1
Q
0
Figure 7-76
7.3.8.17

RSR (RS flip-flop, reset dominant)

Brief description
Reset dominant RS flip-flop for use as a static binary value memory
Mode of operation
With logical 1 at input S, output Q is set to logical 1.
If input R is set to logical 1, output Q is set to logical 0.
If both inputs are logical 0, Q does not change.
If both inputs are logical 1, however, Q is logical 0 because the reset input dominates.
Output QN always has the opposite value to Q.
Function Manual
Function Manual, 01/2011, 6SL3097-4AB10-0BP3
T T
PST (pulse stretcher): Time flow chart
7.3 Function modules
T
Drive functions
309