General Design Considerations; Nominal Board Stackup; Sample Board Stackup - Intel Pentium III Processor 512K Design Manual

2.0

General Design Considerations

This section documents layout and routing guidelines for LV Intel Pentium
platforms. This section does not discuss the functional aspects of any bus, or the layout guidelines
for an add-in device.
If the guidelines listed in this document are not followed, it is very important that thorough signal
integrity and timing simulations are completed for each design. Any deviation from the guidelines
should be simulated. Even when the guidelines are followed, Intel recommends that you simulate
critical signals to ensure proper signal integrity and flight time.
The trace impedance noted (i.e., 55 Ω ± 10%) is the "nominal" trace impedance for a 4.5-mil wide
trace. Nominal trace impedance is the impedance of the trace when not subjected to the fields
created by changing current in neighboring traces. When calculating flight times, it is important to
consider the minimum and maximum impedance of a trace based on the switching of neighboring
traces. Using wider spaces between the traces can minimize this trace-to-trace coupling. In
addition, these wider spaces reduce settling time.
Coupling between two traces is a function of the coupled length, the distance separating the traces,
the signal edge rate, and the degree of mutual capacitance and inductance. To minimize the effects
of trace-to-trace coupling, follow the routing guidelines documented in this section.
2.1

Nominal Board Stackup

Figure 1 is an example of a 14-layer board stack-up. The impedance of all the signal layers should
be 55 Ω ± 10%. A lower trace impedance reduces signal edge rates, overshoot, and undershoot, and
has less crosstalk than a higher trace impedance. A higher trace impedance increases edge rates and
may slightly decrease signal flight times. Please note that thicker core may help reduce board
warpage issues.
Figure 1. Sample Board Stackup
Design Guide
® ®
LV Intel Pentium III Processor 512K Dual Processor Platform
processor 512K
III
Signal Layer
Power Plane
Signal Layer
Ground Plane
Signal Layer
Signal Layer
Power Plane
Ground Plane
Signal Layer
Signal Layer
Ground Plane
Signal Layer
Power Plane
Signal Layer
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