Hardware and Software Considerations for the 8086/8088 Probe
This section describes the unique characteristics of the 8086/8088 probe. You should be aware
of these characteristics when designing prototype hardware and software and when emulating
your prototype.
Separate subsections are provided on the following topics:
•
Address Wrap-around
•
Break Information
— Slipping Past Instruction Breakpoints
— Slipping Past Breakpoints on Combined Instructions
— Breaking in the Middle of an Instruction
•
READY Signal Set-Up Time
•
Request/Grant Line
•
Non-Maskable Interrupt Line and Interrupt Line
•
Non-Maskable Interrupts and Program Stepping
•
Synchronization between the Prototype and the Probe
•
User-Accessible Test Points
— The SYNC START/ Test Point
— The 87 INT Test Point
•
Coprocessor Considerations
•
Inability to Break When RESET Is Asserted
•
Getting a User NMI While in Emulation Mode
•
Using the PICE™ System as a Signal Generator
•
10-MHz 8086 Probe MAX Mode Operation
•
Probe MIN Mode Operation
•
Address/Data Bus Float
Address W rap-Around
The 8086/8088 microprocessor represents a virtual memory address as a selector:offset pair.
The selector and the offset are each 16 bits long. The 8086/8088 microprocessor then trans
.
lates that virtual address into a 20-bit physical address. A memory address in the break/trace
board is 20 bits long.
As shown in Table 4-1, the difference between the way the 8086/8088 microprocessor and the
break/trace board handle memory addresses causes discrepancies when wrap-arounds occur.
4-2
The PICE™ System Personality Modules (Probes)