High-Frequency/Mid-Frequency And Bulk Decoupling Capacitors; Processor Core Voltage Plane And Decoupling - Intel 855GME Design Manual

®
Intel 855GME Chipset and Intel
4.4.2 High-Frequency/Mid-Frequency and Bulk Decoupling
Capacitors
System motherboards shall include high and mid-frequency and bulk decoupling capacitors as
close to the socket power and ground pins as possible. Decoupling shall be arranged such that the
lowest ESL devices (0612 reverse geometry type, if used for some of the recommended options
below) are closest to the processor power pins followed by the 1206 devices (if used), and finally
bulk electrolytics (organic covered tantalum or aluminum covered capacitors). System
motherboards shall include bulk-decoupling capacitors as close to the processor socket power and
ground pins as possible. The layout example shown in
Table 21
Pentium M/Celeron M processor Vccp decoupling recommendations.
recommended GMCH decoupling solutions for the V
4.4.3

Processor Core Voltage Plane and Decoupling

Due to the high current requirements of the processor core voltage, the V
VRM by multiple power planes that provide both low resistance and low inductance paths between
the voltage regulator, decoupling capacitors, and processor V
transient tolerance specifications for the worst-case stimulus, the maximum Equivalent Series
Resistance (ESR) of the decoupling solution shall be equal to or less than 3 m Ω .
Figure 2 (in
both robust, high-frequency signal routing and robust V
The Intel Pentium M/Celeron M processor pin-map is shown in
highlighted V
that contains 49 V
V
CC-CORE
signals, the only option available for providing robust core power delivery to the Intel Pentium
M/Celeron M processor is by placing the VRM and most of the decoupling capacitors to the north
of the core power delivery corridor (found on the north side of the 49 V
is not advised to feed the VR from any other side other than this V
side of the Intel Pentium M/Celeron M processor socket. Due to the high current demand, all the
V
CC-CORE
that are connected to both internal and external power planes. Sharing of vias between several
V
CC-CORE
lists four recommended decoupling solutions for V
Section 3.1) depicts an example of a motherboard power plane stack-up that allows for
power delivery corridor pins concentrated on the north side of the pin-map
CC-CORE
/GND pin pairs while the south side of the socket contains only 24
CC-CORE
/GND pin pairs. Because access to the 24 south side pin pairs is blocked by the legacy
and ground vias of the Intel Pentium M/Celeron M processor pin-map shall have vias
pins or ground pins is not allowed.
January 2007
®
6300ESB ICH Embedded Platform Design Guide
Section 4.4.3
CC-CORE
and V
CCP CCGMCH
CC-CORE
power delivery.
CC-CORE
Figure 42
shall be followed closely.
, while Table 22 lists the Intel
Table 24 lists the
supply rails, respectively.
is fed from the
CC-CORE
pins. To meet the V
CC-CORE
for reference. Note the
/GND pin pairs). It
CC-CORE
corridor on the north
CC-CORE
91