Data Flow Through The M40 Router Packet Forwarding Engine - Juniper M Series Monitoring And Troubleshooting Manual

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Data Flow Through the M40 Router Packet Forwarding Engine

126
Packets arrive at an incoming PIC interface.
1.
The I/O Manager ASIC processes the packet headers, divides the packets into 64-byte
2.
data cells, and passes the cells through the midplane to the SSB.
A Distributed Buffer Manager ASIC on the SSB distributes the data cells throughout
3.
the memory buffers located on and shared by all the FPCs.
The Internet Processor II ASIC on the SSB performs a route lookup for each packet
4.
and decides how to forward it.
The Internet Processor II ASIC notifies a Distributed Buffer Manager ASIC on the SSB
5.
of the forwarding decision, and the Distributed Buffer Manager ASIC forwards the
notification to the FPC that hosts the appropriate outbound interface.
The I/O Manager ASIC on the FPC reassembles data cells stored in shared memory
6.
into data packets as they are ready for transmission and passes them through the
Packet Director ASIC to the outbound PIC.
The outbound PIC transmits the data packets.
7.
M20 Internet Router Overview on page 10
Data flows through the M40 router Packet Forwarding Engine in the sequence shown in
Figure 27 on page 126.
Figure 27: M40 Router Packet Forwarding Engine Components and Data
Flow
Packets arrive at an incoming PIC interface.
1.
The PIC passes the packets to the FPC, where the I/O Manager ASIC processes the
2.
packet headers, divides the packets into 64-byte data cells, and passes the cells to
the backplane.
Copyright © 2012, Juniper Networks, Inc.