Data Flow Through The M7I Router Packet Forwarding Engine; Figure 24: M7I Router Packet Forwarding Engine Components And Data Flow - Juniper M Series Monitoring And Troubleshooting Manual

Related
Documentation

Data Flow Through the M7i Router Packet Forwarding Engine

Copyright © 2012, Juniper Networks, Inc.
Packets arrive at an incoming PIC interface.
1.
The PIC passes the packets through the midplane to the FEB, where the I/O Manager
2.
ASIC breaks them into 64-byte cells.
The Distributed Buffer Manager ASIC on the FEB distributes the data cells throughout
3.
memory banks on the FEB.
The Internet Processor II ASIC on the FEB performs route lookups and makes
4.
forwarding decisions.
The Internet Processor II ASIC notifies a second Distributed Buffer Manager ASIC on
5.
the FEB, which forwards the notification to the outgoing interface.
The I/O Manager ASIC on the FEB reassembles data cells in shared memory into data
6.
packets as they are ready for transmission and passes them to the outgoing PIC
through the midplane.
The outgoing PIC transmits the data packets.
7.
M5 and M10 Internet Router Overview on page 4
Data flows through the M7i router Packet Forwarding Engine in the following sequence
shown in Figure 24 on page
through the system.
Figure 24: M7i Router Packet Forwarding Engine Components and Data
Flow
Packets arrive at an incoming networking interface.
1.
The networking interface passes the packets to the CFEB, where the integrated ASIC
2.
processes the packet headers, divides the packets into 64-byte data cells, and
distributes the data cells throughout the memory buffer.
Chapter 4: Monitoring Key Router Components
123. Use of ASICs promotes efficient movement of data packets
123