Power Configuration Register; Table 23-11. Pc Register; Table 23-12. Pc Register Definitions - Sharp Blue Treak LH75400 User Manual

Analog-to-Digital Converter/Brownout Detector

23.3.2.5 Power Configuration Register

PC is the Power Configuration Register. The active bits used in this register are
Read/Write.
In this register, the clock divider bits are programmed to set the divider of the system clock
for analog operation. Program bits [3:0] to the number of conversions necessary, depend-
ing on the conversion.
NOTE: Allow two A2DCLK cycles between successive write cycles to this register. Otherwise, ADC behavior
BIT
FIELD
RESET
RW
BIT
FIELD
RESET
RW
ADDR
BIT
31:15
14:11
10:8
23-14
can become erratic.
31 30 29 28
0 0 0 0
R R R R
15 14 13 12
/// ///
0 0 0 0
R RW RW RW RW

Table 23-12. PC Register Definitions

NAME
/// Reserved Read as zero.
/// Reserved Write as zero.
Clock Select
000 = Clock oscillator (nominally 14.7456 MHz)
001 = Clock oscillator /2
010 = Clock oscillator /4
011 = Clock oscillator /8
CLKSEL
100 = Clock oscillator /16
101 = Clock oscillator /32
110 = Clock oscillator /64
111 = Clock oscillator /128
If the nominal value is used, the only valid settings are 011, 100, 101, and 110.
LH75400/01/10/11 (Preliminary) User's Guide

Table 23-11. PC Register

27 26 25 24 23
///
0 0 0 0 0
R R R R R
11 10 9 8 7
CLKSEL PWM
0 0 0 0 0
RW RW RW RW
0xFFFC3000 + 0x10
DESCRIPTION
6/25/03
22 21 20 19 18
0 0 0 0 0
R R R R R
6 5 4 3 2
///
0 0 0 0 0
RW RW R RW RW
17 16
0 0
R R
1 0
NOC
0 0
RW RW