Chapter 11 - I/O Configuration; Iocon Theory Of Operation - Sharp Blue Treak LH75400 User Manual

System-on-chip preliminary
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Chapter 11
I/O Configuration
The I/O Configuration (IOCON) peripheral is an AMBA slave block that connects to the
APB. The IOCON provides registers for programming the pin muxing on the device, and
for controlling the pull-up and pull-down resistors on certain pins of the chip.

11.1 IOCON Theory of Operation

All IOCON Control Registers can be accessed through the APB. All pins associated with
GPIO, except bit [14] of the EBI_MUX Register, default to have the GPIO controlling the
pin after a System Reset. (Bit [14] of the EBI_MUX Register can default to the data pins,
depending on the Boot Mode.) The alternative functions can then be accessed by pro-
gramming the IOCON registers. The LCD_MUX does not allow individual control of the
pins; however, it permits different LCD modes to be programmed. Depending on the mode,
different pins either will be used by the LCD or will be GPIO.
The IOCON has five registers for controlling the pull-up/pull-down resistors on certain pins.
These registers default to pull-up, pull-down, or no-pull depending on the pin's function.
6/17/03
11-1

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