Configuration Register For Memory Bank 2; Table 7-14. Bcr2 Register; Table 7-15. Bcr2 Register Definitions - Sharp Blue Treak LH75400 User Manual

System-on-chip preliminary
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LH75400/01/10/11 (Preliminary) User's Guide

7.3.2.3 Configuration Register for Memory Bank 2

BCR2 is the Configuration Register for Memory Bank 2.
BIT
FIELD
RESET
RW
BIT
FIELD
RESET
RW
ADDR
BITS
31:30
29:28
27
26
25
24
23:16
31
30
29
28
27
///
MW
BM
0
0
0
1
0
R
R
RW
RW
RW
15
14
13
12
11
WST2
1
1
1
1
1
RW
RW
RW
RW
RW

Table 7-15. BCR2 Register Definitions

NAME
Reserved Do not write. Must be set to 00. Unpredictable behavior if set to
///
any other value. Read as zero.
Memory Width
00 = 8-bit
01 = 16-bit
MW
10 = Reserved
11 = Reserved
The MW field defaults to different values for each memory bank at reset. See
Table 7-18.
Burst Mode
BM
0 = Non-burst devices (Default)
1 = Burst ROM
Write Protect
WP
0 = SRAM, not write protected (Default)
1 = ROM, burst ROM and write-protected SRAM
Write Protect Error Status Flag
0 = No error (Default)
WPERR
1 = Write-protect error
Writing a 1 to this bit clears the write-protect error-status flag.
Bus Transfer Error Status Flag
0 = No error (Default)
BUSERR
1 = Bus-transfer error
Writing a 1 to this bit clears the bus-transfer error-status flag.
///
Reserved Do not write. Do not modify. Unpredictable behavior when read.

Table 7-14. BCR2 Register

26
25
24
23
WP
0
0
0
0
RW
RW
RW
R
10
9
8
7
WST1
1
1
1
1
RW
RW
RW
RW
0xFFFF1000 + 0x08
DESCRIPTION
6/17/03
Static Memory Controller
22
21
20
19
18
///
0
0
0
0
0
R
R
R
R
R
6
5
4
3
2
///
1
1
0
1
1
RW
RW
R
RW
RW
17
16
0
0
R
R
1
0
IDCY
1
1
RW
RW
7-17

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