Idle High Word Register; Table 23-23. Ihwctrl Register; Table 23-24. Ihwctrl Register Definitions - Sharp Blue Treak LH75400 User Manual

System-on-chip preliminary
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Analog-to-Digital Converter/Brownout Detector

23.3.2.12 Idle High Word Register

IHWCTRL is the high word of the Idle Register. The active bits used in this register are
Read/Write.
This register specifies the idle setting time and the inputs connected to the ADC during the
Idle state. This register is used with the ILWCTRL Register (see Section 23.3.2.13).
BIT
FIELD
RESET
RW
BIT
FIELD
RESET
RW
ADDR
BIT
31:16
15:7
6:3
2
1:0
23-22

Table 23-23. IHWCTRL Register

31
30
29
28
27
0
0
0
0
0
R
R
R
R
R
15
14
13
12
11
SETTIME_ID
0
0
0
0
0
RW
RW
RW
RW
RW

Table 23-24. IHWCTRL Register Definitions

NAME
///
Reserved Read as zero.
Idle Settling Time Specifies the delay, in ADC clock cycles, from when
the state machine enters the Idle state to when the Pen Interrupt signal
SETTIME_ID
can be activated. Prevents spurious trigger of Pen Interrupt while analog
signals set up by the IDLE Register are settling.
Idle In+ Mux Specifies the connection to the positive input of the ADC
INP_ID
during Idle Mode.
Idle In- Mux Specifies the connection to the negative input of the ADC
during Idle Mode.
INM_ID
0 = Ref-
1 = GND
Idle Ref+ Mux Specifies the connection to the positive reference of the
ADC during Idle Mode.
00 = VREF+
REFP_ID
01 = AN0 (UL/X+)
10 = AN2 (LL/Y+)
11 = AN8
LH75400/01/10/11 (Preliminary) User's Guide
26
25
24
23
22
///
0
0
0
0
R
R
R
R
R
10
9
8
7
0
0
0
0
RW
RW
RW
RW
RW
0xFFFC3000 + 0xA4
DESCRIPTION
6/25/03
21
20
19
18
0
0
0
0
0
R
R
R
R
6
5
4
3
2
INP_ID
0
0
0
0
0
RW
RW
RW
RW
17
16
0
0
R
R
1
0
REFP_ID
0
0
RW
RW

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