Brgb Configuration Register; Table 20-71. Bbcf Register; Table 20-72. Bbcf Register Definitions - Sharp Blue Treak LH75400 User Manual

System-on-chip preliminary
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UART2

20.3.2.31 BRGB Configuration Register

Register Bank: 3
BBCF is the BRGB Configuration Register. The BBCF Register defines the BRGB clock
sources and operating mode.
NOTE: BRGB can also obtain its input clock from the BRGA output.
BIT
FIELD
RESET
RW
BIT
FIELD
RESET
RW
ADDR
BITS
31:8
7:6
5:3
2
1:0
20-42

Table 20-71. BBCF Register

31
30
29
28
27
0
0
0
0
0
R
R
R
R
R
15
14
13
12
11
///
0
0
0
0
0
R
R
R
R
R

Table 20-72. BBCF Register Definitions

NAME
///
Reserved Do not modify. Read as zero.
Defines the input clock sources for BRGV.
00 = System clock
01 = Reserved
BBCS1, BBCS0
10 = BRGA output
11 = Reserved
These bits have no effect in Timer Mode.
///
Reserved Read as zero.
BRBG Mode of Operation
BBM
0 = Timer Mode; input clock source is always the system clock.
1 = BRG Mode.
///
Reserved Read as zero.
LH75400/01/10/11 (Preliminary) User's Guide
26
25
24
23
22
///
0
0
0
0
R
R
R
R
R
10
9
8
7
0
0
0
1
R
R
R
RW
RW
0xFFFC2000 + 0x0C
DESCRIPTION
6/17/03
21
20
19
18
0
0
0
0
0
R
R
R
R
6
5
4
3
2
///
BBM
0
0
0
0
1
R
R
RO
RW
17
16
0
0
R
R
1
0
///
0
0
R
R

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