LH75400/01/10/11 (Preliminary) User's Guide
21.2.3.10 Port F Data Register
PFDR is the Port F Data Register. The active bits used in this register are Read/Write.
Values written to PFDR will be output on the PF pins if the corresponding PFDDR Data
Direction bits are set HIGH (port output).
The values read from each bit of this register are determined by the value of the corre-
sponding bit in the Port F Data Direction Register (see Section 21.2.3.12). A read opera-
tion from this register returns either:
• The last value written to the Data Register, if the bit is configured as an output.
• The current value on the corresponding port input if the bit is configured as an input.
A System Reset clears all bits.
BIT
FIELD
RESET
RW
BIT
FIELD
RESET
RW
ADDR
BITS
31:7
6:0
31
30
29
28
0
0
0
0
R
R
R
R
15
14
13
12
0
0
0
0
R
R
R
R
Table 21-22. PFDR Register Definitions
NAME
///
Reserved Writing to these bits has no effect. Reading returns 0.
Port F Input/Output Data Specifies Port F input or output data, depending
on how the value of the corresponding bit in the PFDDR Register is set
(see Section 21.2.3.12).
Port F Data
PFDDR set as output = PFDR sets the value on the GPIO Port F pins.
PFDDR set as input = PFDR reads the value on the GPIO Port F pins.
Table 21-21. PFDR Register
27
26
25
24
23
///
0
0
0
0
0
R
R
R
R
R
11
10
9
8
7
///
0
0
0
0
0
R
R
R
R
R
0xFFFDD000 + 0x04
FUNCTION
6/17/03
General Purpose Input/Output
22
21
20
19
18
0
0
0
0
0
R
R
R
R
R
6
5
4
3
2
Port F Data
0
0
0
0
0
RW
RW
RW
RW
RW
17
16
0
0
R
R
1
0
0
0
RW
RW
21-13