Uart0 And Uart1 Register Definitions; Data Register; Table 19-2. Dr Register - Sharp Blue Treak LH75400 User Manual

UART0 and UART1

19.3.1 UART0 and UART1 Register Definitions

19.3.1.1 Data Register

DR is the Data Register for words that are to be transmitted or have been received over
the serial interface. Writing to this register initiates transmission from the UART.
• If the FIFOs are enabled, data written to this location is pushed onto the transmit FIFO.
• If the FIFOs are not enabled, data is stored in the Transmitter Holding Register (the
bottom word of the transmit FIFO).
A read to this register pops the first word from the receive FIFO. This word consists of the
received character and the associated error bits.
BIT
FIELD
RESET
RW
BIT
FIELD
RESET
RW
ADDR
19-6
31 30 29 28 27
0 0 0 0 0
R R R R R
15 14 13 12 11
///
0 0 0 0 0
R R R R R
LH75400/01/10/11 (Preliminary) User's Guide

Table 19-2. DR Register

26 25 24 23
///
0 0 0 0
R R R R
10 9 8 7
0 0 0 0
R R R RW
UART0: 0xFFFC0000 + 0x000
UART1: 0xFFFC1000 + 0x000
7/15/03
22 21 20 19 18
0 0 0 0 0
R R R R R
6 5 4 3 2
DATA
0 0 0 0 0
RW RW RW RW RW
17 16
0 0
R R
1 0
0 0
RW RW