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Analog-to-Digital Converter/Brownout Detector
23.3.3 ADC Timing Formulas
The throughput-conversion time consists of 1 cycle of Get Data state added to 16 cycles
of measurement. Starting from the Idle state, the time for a complete measurement
sequence, in clock cycles, is calculated as:
1CIS + #MS × (TCT + #STC) + 1CEOS
where:
• 1CIS is one cycle in Idle state
• #MS is the number of measurements in the sequence
• TCT is the throughput conversion time of 17 cycles
• #STC is the number of settling time cycles per measurement
• 1CEOS is one cycle in the End of Sequence state.
This equals:
• Two cycles, plus
• The number of measurements in sequence times, plus
• The throughput conversion time (17 cycles), plus
• The number of settling time cycles per measurement.
23.3.4 ADC Interrupts
The ADC has five interrupts:
• Brownout Interrupt (BrownOutINTR)
• Pen Interrupt (PenIRQ)
• End of Sequence Interrupt
• FIFO Watermark Interrupt
• FIFO Overrun Interrupt.
All five interrupts make up the combined interrupt TSCIRQ.
Each of the five individual maskable interrupts is enabled or disabled by changing the
mask bits in the IM Register (see Section 23.3.2.4). Software can read the interrupt status
bits through the IS Register, even if corresponding mask bits are set (see
Section 23.3.2.9). Clearing the mask bits does not clear the interrupt status.
23-26
LH75400/01/10/11 (Preliminary) User's Guide
6/25/03
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