LH75400/01/10/11 (Preliminary) User's Guide
22.3.2.20 Receive Buffer Start Address Register
RBSA is the Receive Buffer Start Address Register. The active bits used in this register
are Read/Write.
This register records the current location of the RX FIFO Read Pointer within the 64-byte
RX FIFO as a value between 0 and 63.
• Location 0 corresponds to CAN Offset 0x80.
• Location 63 corresponds to CAN Offset 0x17C.
This register is reset to 00h by a System Reset, but is left unchanged by a Software Reset
(which also does not change the FIFO contents). However, the RX FIFO Write Pointer is
set by a Software Reset to the value of the RX FIFO Read Pointer. As a result, the data
accessed by the Receive Buffer following a Software Reset is overwritten by the next mes-
sage to be recorded in the RX FIFO.
NOTE: It is only possible to write to this register in Reset Mode.
BIT
FIELD
RESET
RW
BIT
FIELD
RESET
RW
ADDR
BIT
31:8
7:0
Table 22-36. RBSA Register
31
30
29
28
27
0
0
0
0
0
R
R
R
R
R
15
14
13
12
11
0
0
0
0
0
R
R
R
R
R
Table 22-37. RBSA Register Definitions
NAME
Reserved Writing to these bits has no effect. Reading returns 0.
///
RX FIFO Read Pointer Location Specifies the current location of
RMC.4 - RMC.0
the RX FIFO Read Pointer within the 64-byte RX FIFO.
26
25
24
23
///
0
0
0
0
R
R
R
R
10
9
8
7
///
0
0
0
0
R
R
R
R
0xFFFC5000 + 0x78
DESCRIPTION
6/17/03
Controller Area Network
22
21
20
19
18
0
0
0
0
0
R
R
R
R
R
6
5
4
3
2
RBSA
0
0
0
0
0
R
RW
RW
RW
RW
17
16
0
0
R
R
1
0
0
0
RW
RW
22-29