Address/Control Character Register 1; Table 20-57. Actrl1 Register; Table 20-58. Actrl1 Register Definitions - Sharp Blue Treak LH75400 User Manual

System-on-chip preliminary
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LH75400/01/10/11 (Preliminary) User's Guide

20.3.2.24 Address/Control Character Register 1

Register Bank: 2
Like the ACTRL0 Register, the ACTRL1 Register contains a byte that is compared to each
received character. The value in ACTRL1 is usually a value different from the one in
ACTRL0. For information about how the Address/Control Character Registers are used,
see Section 20.3.2.10.
BIT
FIELD
RESET
RW
BIT
FIELD
RESET
RW
ADDR
BITS NAME
31:8
7:0

Table 20-57. ACTRL1 Register

31
30
29
28
27
0
0
0
0
0
R
R
R
R
R
15
14
13
12
11
///
0
0
0
0
0
R
R
R
R
R

Table 20-58. ACTRL1 Register Definitions

///
Reserved Do not modify. Read as zero.
D7:D0 Data Bit [7] holds the most-significant bit. Bit [0] holds the least-significant bit.
26
25
24
23
22
///
0
0
0
0
0
R
R
R
R
R
10
9
8
7
6
D7
D6
0
0
0
0
0
R
R
R
RW
RW
0xFFFC2000 + 0x14
DESCRIPTION
6/17/03
21
20
19
18
17
0
0
0
0
0
R
R
R
R
R
5
4
3
2
1
D5
D4
D3
D3
D1
0
0
0
0
0
RW
RW
RW
RW
RW
UART2
16
0
R
0
D0
0
RW
20-35

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