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Static Memory Controller
7.3 SMC Programmer's Model
The base address for the SMC external memory (SMC MemBase) is:
SMC MemBase Address: 0x40000000 (also 0x00000000 if REMAP is '00')
SMC memory banks have fixed address offsets from the base address.
7.3.1 SMC Register Summary
The base address for the SMC Control and Status Registers (SMC RegBase) is:
SMC RegBase: 0xFFFF1000
The SMC register banks have fixed offsets from this address.
NAME
BCR0 SMC RegBase + 0x00
BCR1 SMC RegBase + 0x04
BCR2 SMC RegBase + 0x08
BCR3 SMC RegBase + 0x0C
NOTE: The reset value of the first SMC base register depends on bus width. If PD2/INT2 is pulled HIGH on
7-12
Table 7-7. SMC Memory Bank Address Space
ADDRESS
SMC MemBase + 0x00000000 SMC Memory Bank 0
SMC MemBase + 0x04000000 SMC Memory Bank 1
SMC MemBase + 0x08000000 SMC Memory Bank 2
SMC MemBase + 0x0C000000 SMC Memory Bank 3
Table 7-8. SMC Register Summary
ADDRESS OFFSET
TYPE WIDTH
RW
RW
RW
RW
Reset, Bank 0 defaults to a 16-bit memory width. If PD2/INT2 is pulled LOW on Reset, Bank 0 defaults
to an 8-bit memory width.
LH75400/01/10/11 (Preliminary) User's Guide
DESCRIPTION
RESET
VALUE
0x1000FFEF (16-bit) or
32
0x0000FBEF (8-bit)
32
0x1000FFEF
32
0x1000FFEF
32
0x1000FFEF
6/17/03
DESCRIPTION
Configuration Register for
Memory Bank 0
Configuration Register for
Memory Bank 1
Configuration Register for
Memory Bank 2
Configuration Register for
Memory Bank 3
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