Interrupt Enable Register; Table 22-10. Ier Register; Table 22-11. Ier Register Definitions - Sharp Blue Treak LH75400 User Manual

LH75400/01/10/11 (Preliminary) User's Guide

22.3.2.5 Interrupt Enable Register

IER is the Interrupt Enable Register. This register selects the events that are indicated to the
CPU through an interrupt being generated. It appears to the CPU as Read/Write memory.
BIT
FIELD
RESET
RW
BIT
FIELD
RESET
RW
ADDR
BITS NAME
31:8
7
6
5
4
3
2
1
0
31 30 29 28 27
0 0 0 0
R R R R R
15 14 13 12 11
///
0 0 0 0
R R R R R

Table 22-11. IER Register Definitions

/// Reserved Writing to these bits has no effect. Reading returns 0.
Bus Interrupt Error Enable
BEIE
0 = Interrupt is disabled.
1 = An interrupt is generated when a bus error is detected.
Arbitration Lost Interrupt Enable
ALIE
0 = Interrupt is disabled.
1 = An interrupt is generated when the CAN Controller loses arbitration.
Error Passive Interrupt Enable
0 = Interrupt is disabled.
EPIE
1 = An interrupt is generated when the error status of the CAN Controller changes from error
active to error passive or vice versa.
/// Reserved
Data Overrun Interrupt Enable
DOIE
0 = Interrupt is disabled.
1 = An interrupt is generated when bit [1] of the Status Register is set (see Section 22.3.2.3).
Error Warning Interrupt Enable
0 = Interrupt is disabled.
EIE
1 = An interrupt is generated when the Bus Status bit ([bit [7]) or the Error Status bit (bit [6])
of the Status Register change (see Section 22.3.2.3).
Transmit Interrupt Enable
0 = Interrupt is disabled.
TIE
1 = An interrupt is generated when a message has been successfully transmitted or when
the transmit buffer is accessible.
Receive Interrupt Enable
0 = Interrupt is disabled.
1 = An interrupt is generated when bit [0] of the Status Register is full (see Section 22.3.2.3).
RIE
This bit influences bit [0] of the Interrupt Register (described in Section 22.3.2.4) and the
external interrupt output, NINT. If RIE clears, NINT becomes inactive (HIGH) immediately if
no other interrupt is pending.

Table 22-10. IER Register

26 25 24 23
///
0 0 0 0 0
R R R R
10 9 8 7
BEIE ALIE EPIE
0 0 0 0 0
R R R RW
0xFFFC5000 + 0x10
DESCRIPTION
6/17/03
Controller Area Network
22 21 20 19 18
0 0 0 0 0
R R R R R
6 5 4 3 2
/// DOIE EIE
0 0 0 0 0
RW RW RW RW RW
17 16
0 0
R R
1 0
TIE RIE
0 0
RW RW
22-13