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LH75400/01/10/11 (Preliminary) User's Guide
20.3.2.14 Timer Status Register
Register Bank: 1
TMST is the Timer Status Register. The TMST Register holds the status of the timers. Bits
[1] and [0] of this register generate interrupts that are reflected in the TIR bit (bit [5]) of the
GSR Register (see Section 20.3.2.20).
Bits [5] and [4] of this register display the counting status, but do not generate interrupts.
This register is not useful when using the timer in Baud Rate Generation Mode.
When this register is read, the read operation clears bits [1:0] of this register.
NOTE: Do not use the TMST Register to check the timer-expire status of UART2. Instead, use the UART2
BIT
FIELD
RESET
RW
BIT
FIELD
RESET
RW
ADDR
BITS NAME
31:6
5
4
3:2
1
0
Timer Interrupts.
31
30
29
28
27
0
0
0
0
R
R
R
R
R
15
14
13
12
11
0
0
0
0
R
R
R
R
R
Table 20-38. TMST Register Definitions
///
Reserved Do not modify. Read as zero.
Gate B State Indicates the counting state of the software gate of Timer B, as written
through the TMCTRL Register (see Section 20.3.2.13).
GBS
0 = Disables counting.
1 = Enables counting.
This bit does not generate an interrupt.
Gate A State Reflects the state of the software gate of Timer A, as written through the TM-
CTRL Register (see Section 20.3.2.13).
GAS
0 = Disables counting.
1 = Enables counting.
This bit does not generate an interrupt.
///
Reserved Read as zero.
Timer B Expired
1 = Generates an interrupt through the TIR bit of the GSR Register to indicate that Timer B
TBEx
count has expired.
This bit is set via the terminal count pulse that the timer generates when it terminates counting.
Timer A Expired
1 = Generates an interrupt through the TIR bit of the GSR Register to indicate that Timer A
count has expired.
TAEx
This bit is set via the terminal count pulse that the timer generates when it terminates counting.
Table 20-37. TMST Register
26
25
24
23
///
0
0
0
0
0
R
R
R
R
10
9
8
7
///
0
0
0
0
0
R
R
R
R
0xFFFC2000 + 0x0C
DESCRIPTION
6/17/03
22
21
20
19
18
0
0
0
0
0
R
R
R
R
R
6
5
4
3
2
GBS GAS
///
0
1
1
0
0
R
R
R
R
R
UART2
17
16
0
0
R
R
1
0
TBEx TAEx
0
0
R
R
20-25
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