Vertical Timing Panel Control Register; Table 14-9. Timing1 Register; Table 14-10. Timing1 Register Definitions - Sharp Blue Treak LH75400 User Manual

Liquid Crystal Display Controller

14.3.2.3 Vertical Timing Panel Control Register

The Timing1 Register controls the:
• Number of Lines-Per-Panel (LPP)
• Vertical Synchronization Pulse Width (VSW)
• Vertical Front Porch (VFP) period
• Vertical Back Porch (VBP) period
BIT
FIELD
RESET
RW
BIT
FIELD
RESET
RW
ADDR
BIT
31:24
23:16
15:10
9:0
14-10

Table 14-9. Timing1 Register

31 30 29 28
VBP
0 0 0 0
RW RW RW RW RW
15 14 13 12
VSW
0 0 0 0
RW RW RW RW RW

Table 14-10. Timing1 Register Definitions

NAME
Vertical Back Porch Specifies the number of inactive lines at the start of a frame, after
vertical synchronization period; that is, the number of line clocks inserted at the beginning
of each frame. Program to zero on passive displays; otherwise, reduced contrast will result.
The VBP count starts just after the Vertical Synchronization signal for the previous frame
VBP
has been negated for Active Mode, or the extra line clocks have been inserted as specified
by the VSW bit field in Passive Mode. After this has occurred, the count value in VBP sets
the number of line clock periods inserted before the next frame. VBP generates from 0 –
255 extra line clock cycles.
Vertical Front Porch Specifies the number of inactive lines at the end of frame, before ver-
tical synchronization period; that is, the number of line clocks to insert at the end of each
frame. Program to zero on passive displays; otherwise, reduced contrast will result. Once a
VFP complete frame of pixels is transmitted to the LCD display, the value in VFP counts the num-
ber of line clock periods to wait. After the count has elapsed, the Vertical Synchronization
signal is asserted in Active Mode, or extra line clocks are inserted as specified by the VSW
bit field in Passive Mode. VFP generates from 0 – 255 line clock cycles.
Vertical Synchronization Pulse Width
tion lines; that is, the pulse width of the vertical synchronization pulse. Should be small (for
example, program to zero) for passive STN LCDs. Program to the number of lines required
VSW minus one. The higher the value, the worse the contrast on STN LCDs. The register is pro-
grammed with the number of line clocks in Vsync minus one. Number of horizontal synchro-
nization lines. Should be small (for example, program to zero) for passive STN LCDs.
Program to the number of lines required minus one.
Lines Per Panel Specifies the number of active lines per screen. Program to number of
lines required minus 1; that is, the total number of lines or rows on the LCD panel being con-
LPP trolled. LPP is a 10-bit value allowing between 1 and 1,024 lines. The register is programmed
with the number of lines per LCD panel minus 1. For dual-panel displays this register is pro-
grammed with the number of lines on each of the upper and lower panels.
LH75400/01/10/11 (Preliminary) User's Guide
27 26 25 24 23
0 0 0 0 0
RW RW RW RW
11 10 9 8 7
0 0 0 0 0
RW RW RW RW
0xFFFF4000 + 0x04
DESCRIPTION
Specifies the number of horizontal synchroniza-
6/17/03
22 21 20 19 18
VFP
0 0 0 0 0
RW RW RW RW RW
6 5 4 3 2
LPP
0 0 0 0 0
RW RW RW RW RW
17 16
0 0
RW RW
1 0
0 0
RW RW