Receive Buffered Data Register; Table 20-7. Rxd Register; Table 20-8. Rxd Register Definitions - Sharp Blue Treak LH75400 User Manual

LH75400/01/10/11 (Preliminary) User's Guide

20.3.2.2 Receive Buffered Data Register

Register Banks: 0 and 1
RXD is the Receive Buffered Data Register. The RXD Register holds the earliest received
character in the Rx FIFO After System Reset, this register is undefined.
BIT
FIELD
RESET
RW
BIT
FIELD
RESET
RW
ADDR
BITS NAME
31:8
7:0
31 30 29 28 27
0 0 0 0 0
R R R R R
15 14 13 12 11
///
0 0 0 0 0
R R R R R

Table 20-8. RXD Register Definitions

/// Reserved Do not modify. Read as zero.
Received Data Bit [7] holds the most-significant bit. Bit [0] holds the
D7:D0
least-significant bit.

Table 20-7. RXD Register

26 25 24 23
///
0 0 0 0
R R R R
10 9 8 7
D7
0 0 0 0
R R R R
0xFFFC2000 + 0x00
DESCRIPTION
6/17/03
22 21 20 19 18
0 0 0 0 0
R R R R R
6 5 4 3 2
D6 D5 D4 D3 D2
0 0 0 0 0
R R R R R
UART2
17 16
0 0
R R
1 0
D1 D0
0 0
R R
20-11