Port G Data Register; Table 21-27. Pgdr Register; Table 21-28. Pgdr Register Definitions - Sharp Blue Treak LH75400 User Manual

System-on-chip preliminary
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General Purpose Input/Output

21.2.3.13 Port G Data Register

PGDR is the Port G Data Register. The active bits used in this register are Read/Write.
Values written to PGDR are output on the PG pins if the corresponding PGDDR Data
Direction bits are set HIGH (port output).
The values read from each bit of this register are determined by the value of the corre-
sponding bit in the Data Direction Register (see Section 21.2.3.15). A read from this reg-
ister returns either:
• The last bit value written if the bit is configured as an output.
• The current value on the corresponding port input if the bit is configured as an input.
A System Reset clears all bits.
BIT
FIELD
RESET
RW
BIT
FIELD
RESET
RW
ADDR
BITS
31:8
7:0
21-16

Table 21-27. PGDR Register

31
30
29
28
27
0
0
0
0
R
R
R
R
15
14
13
12
11
///
0
0
0
0
R
R
R
R

Table 21-28. PGDR Register Definitions

NAME
///
Reserved Writing to these bits has no effect. Reading returns 0.
Port G Input/Output Data Specifies Port G input or output data, depend-
ing on how the value of the corresponding bit in the PGDDR Register is set
(see Section 21.2.3.15).
Port G Data
PGDDR set as output = PGDR sets the value on the GPIO Port G pins.
PGDDR set as input = PGDR reads the value on the GPIO Port G pins.
LH75400/01/10/11 (Preliminary) User's Guide
26
25
24
23
///
0
0
0
0
0
R
R
R
R
R
10
9
8
7
0
0
0
0
0
R
R
R
R
RW
0xFFFDC000 + 0x00
FUNCTION
6/17/03
22
21
20
19
18
0
0
0
0
0
R
R
R
R
R
6
5
4
3
2
Port G Data
0
0
0
0
0
RW
RW
RW
RW
RW
17
16
0
0
R
R
1
0
0
0
RW
RW

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