LH75400/01/10/11 (Preliminary) User's Guide
22.3.2.11 Receive Error Counter Register
RXERR is the Receive Error Counter Register. The RXERR Register records the current
value of the Receive Error Counter. After a System Reset or when a Bus Off event occurs,
this register is automatically set to '0'. This register works with the Transmit Error Counter
(described in Section 22.3.2.12) to create a metric for communication quality based on his-
toric performance.
This register can only be written to in Reset Mode. Changes made during Reset Mode only
go into effect when the CAN Controller returns to Operating Mode.
In Operating Mode, this register is Read Only. Writing to this register has no effect when
the CAN Controller is in Bus Off state.
BIT
FIELD
RESET
RW
BIT
FIELD
RESET
RW
ADDR
BIT
31:8
7:0
RXERR 7 - RXERR.0
Table 22-25. RXERR Register
31
30
29
28
27
0
0
0
0
0
R
R
R
R
R
15
14
13
12
11
///
0
0
0
0
0
R
R
R
R
R
Table 22-26. RXERR Register Definitions
NAME
Reserved Writing to these bits has no effect. Reading returns 0.
///
Receive Error Counter Value Specifies the current value of the
Receive Error Counter.
26
25
24
23
22
///
0
0
0
0
0
R
R
R
R
R
10
9
8
7
6
0
0
0
0
1
R
R
R
R
R
0xFFFC5000 + 0x38
DESCRIPTION
6/17/03
Controller Area Network
21
20
19
18
17
0
0
0
0
0
R
R
R
R
R
5
4
3
2
1
1
0
0
0
0
R
R
R
R
R
16
0
R
0
0
R
22-21