Status Register; Table 18-9. Sr Register; Table 18-10. Sr Register Definitions - Sharp Blue Treak LH75400 User Manual

LH75400/01/10/11 (Preliminary) User's Guide

18.5.2.4 Status Register

SR is the Status Register. This register contains bits that indicate the FIFO fill status and
the SSP busy status.
BIT
FIELD
RESET
RW
BIT
FIELD
RESET
RW
ADDR
BITS NAME
31:16
15:5
4
3
2
1
0
31 30 29 28 27
0 0 0 0 0
R R R R R
15 14 13 12 11
0 0 0 0 0

Table 18-10. SR Register Definitions

Reserved Writing to these bits has no effect. Reading returns 0.
///
/// Reserved Write as 0. Unpredictable behavior when read.
SSP Busy Flag
BSY
0 = SSP is idle.
1 = SSP is transmitting and/or receiving a frame or the transmit FIFO is non-empty.
Receive FIFO Full
RFF
0 = Receive FIFO is not full.
1 = Receive FIFO is full.
Receive FIFO Not Empty
RNE
0 = Receive FIFO is empty.
1 = Receive FIFO is not empty.
Transmit FIFO Not Full
TNF
0 = Transmit FIFO is full.
1 = Transmit FIFO is not full.
Transmit FIFO Empty
TFE
0 = Transmit FIFO is not empty.
1 = Transmit FIFO is empty.

Table 18-9. SR Register

26 25 24 23
///
0 0 0 0
R R R R
10 9 8 7
///
0 0 0 0
0xFFFC6000 + 0x00C
DESCRIPTION
6/17/03
Synchronous Serial Port
22 21 20 19 18
0 0 0 0 0
R R R R R
6 5 4 3 2
BSY RFF RNE
0 0 0 0 0
R R R
17 16
0 0
R R
1 0
TNF TFE
1 1
R R
18-15