Uart Line Control Register; Table 19-10. Updating Register Contents - Sharp Blue Treak LH75400 User Manual

System-on-chip preliminary

Table of Contents

LH75400/01/10/11 (Preliminary) User's Guide

19.3.1.4 UART Line Control Register

The LCTRL Register is a single 30-bit register formed from three registers in the address map:

The 30 bits of LCR are updated when LCR_H is written. Table 19-10 shows how to update

the contents of the register.

The IBRD or FBRD Register

Both the IBRD and FBRD Registers

Either the IBRD or FBRD Register

The following UART clock frequency must be selected:

This frequency must be within the required error limits for all baud rates to be used and

must not be more than 5/3 times faster than the frequency of the system clock.

(MIN.) ≥ 16 × baud_rate (MAX.)

(MAX.) ≤ 16 × 65535 × baud_rate (MIN.)

A LCR_H write operation at the end.

Write to each register's location in either order, then write

Write only to the desired register, then write to LCR_H.

UART0 and UART1