Clocks Configure Register; Table 20-63. Clcf Register; Table 20-64. Clcf Register Definitions - Sharp Blue Treak LH75400 User Manual

UART2

20.3.2.27 Clocks Configure Register

Register Bank: 3
CLCF is the Clocks Configure Register. The CLCF Register defines the transmit and
receive code modes and sources.
BIT
FIELD
RESET
RW
BIT
FIELD
RESET
RW
ADDR
BITS
31:7*
6
5*
4
3:0
NOTE: *Bits [7] and [5] must always be set to 0 for proper operation.
20-38

Table 20-63. CLCF Register

31 30 29 28 27
0 0 0 0 0
R R R R R
15 14 13 12 11
///
0 0 0 0 0
R R R R R

Table 20-64. CLCF Register Definitions

NAME
Reserved Do not modify. Read as zero.
///
Transmitter Clock Source Selects the source of the internal transmit
clock.
TXCS
0 = BRGB output
1 = BRGA output
/// Reserved Read as zero.
Receiver Clock Source Selects the source of the internal receive clock.
RXCS
0 = BRGB output
1 = BRGA output
/// Reserved Read as zero.
LH75400/01/10/11 (Preliminary) User's Guide
26 25 24 23 22
///
0 0 0 0
R R R R R
10 9 8 7
0 0 0 0
R R R R RW
0xFFFC2000 + 0x00
DESCRIPTION
6/17/03
21 20 19 18
0 0 0 0 0
R R R R
6 5 4 3 2
///
0 0 0 0 0
R RW R R
17 16
0 0
R R
1 0
///
0 0
R R