Circuit Description - Mitel SX-200 Practices

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DATASET 2100 Series Description
VDICE PATH - IKWOREEN
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Figure X-5 Modem Pooling with a Standalone Dataset
Circuit Description
15.11 The DATASET 2100 Series circuit contains six basic blocks, as shown in
Figure 15-6 The microcontroller is the central processor for the dataset; it contains
two timers, the BAUD rate generator, the Universal Asynchronous Receiver
Transmitter (UART) and the system High-level Data Link Control (HDLC), The
switches on the data set interface directly to the microcontroller; this way, the
firmware can override the switch settings.
9109-096-126-NA Issue 1
Revision 0 126 15-17