Renesas M16C/62P Series Hardware Manual page 202

M16C/62P Group (M16C/62P, M16C/62PT)
UARTi Special Mode Register 2 (i=0 to 2)
b7 b6 b5 b4 b3 b2 b1 b0
UARTi special mode register 3 (i=0 to 2)
b7 b6 b5 b4 b3 b2 b1 b0
NOTES :
1. The DL2 to DL0 bits are used to generate a delay in SDAi output by digital means during I
mode, set these bits to "000b" (no delay).
2. The amount of delay varies w ith the load on SCLi and SDAi pins. Also, w hen using an external clock, the amount of
delay increases by about 100 ns.
Figure 17.11 UiSMR2 and UiSMR3 Registers
Rev.2.41 Jan 10, 2006
REJ09B0185-0241
http://www.xinpian.net
Symbol
U0SMR2 to U2SMR2
Bit Name
Bit Symbol
2
I C Mode Select Bit 2
IICM2
Clock-Synchronous Bit
CSC
SCL Wait Output Bit
SWC
SDA Output Stop Bit
ALS
UARTi Initialization Bit
STAC
SCL Wait Output Bit 2
SWC2
SDA Output Disable Bit
SDHI
— Nothing is assigned.
(b7) When w rite, set to "0". When read, its content is indeterminate.
Symbol
U0SMR3 to U2SMR3
Bit Name
Bit Symbol
— Nothing is assigned.
(b0) When w rite, set to "0". When read, its content is indeterminate.
Clock Phase Set Bit
CKPH
— Nothing is assigned.
(b2) When w rite, set to "0". When read, its content is indeterminate.
Clock Output Select Bit
NODC
— Nothing is assigned.
(b4) When w rite, set to "0". When read, its content is indeterminate.
SDAi Digital Delay
(1, 2)
Setup Bit
DL0
DL1
DL2
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Address
036Eh, 0372h, 0376h
See Table 17.13 I
0 : Disabled
1 : Enabled
0 : Disabled
1 : Enabled
0 : Disabled
1 : Enabled
0 : Disabled
1 : Enabled
0: Transfer clock
1: "L" output
0: Enabled
1: Disabled (high-impedance)
Address
036Dh, 0371h, 0375h
0 : Without clock delay
1 : With clock delay
0 : CLKi is CMOS output
1 : CLKi is N-channel open drain output
b7 b6 b5
0 0 0 : Without delay
0 0 1 : 1 to 2 cycle(s) of UiBRG count source
0 1 0 : 2 to 3 cycles of UiBRG count source
0 1 1 : 3 to 4 cycles of UiBRG count source
1 0 0 : 4 to 5 cycles of UiBRG count source
1 0 1 : 5 to 6 cycles of UiBRG count source
1 1 0 : 6 to 7 cycles of UiBRG count source
1 1 1 : 7 to 8 cycles of UiBRG count source
17. Serial Interface
After Reset
X0000000b
Function
2
C Mode Functions
After Reset
000X0X0Xb
Function
2
C mode. In other than I
010-62245566 13810019655
RW
RW
RW
RW
RW
RW
RW
RW
—
RW
—
RW
—
RW
—
RW
RW
RW
2
C