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M16C/62P Group (M16C/62P, M16C/62PT)
12.7
NMI Interrupt
An NMI interrupt is generated when input on the NMI pin changes state from high to low. The NMI interrupt is a
non-maskable interrupt.
The input level of this NMI interrupt input pin can be read by accessing the P8_5 bit in the P8 register.
This pin cannot be used as an input port.
12.8
Key Input Interrupt
Of P10_4 to P10_7, a key input interrupt is generated when input on any of the P10_4 to P10_7 pins which has had
the PD10_4 to PD10_7 bits in the PD10 register set to "0" (= input) goes low. Key input interrupts can be used as a
key-on wake up function, the function which gets the microcomputer out of wait or stop mode. However, if you
intend to use the key input interrupt, do not use P10_4 to P10_7 as analog input ports. Figure 12.12 shows the block
diagram of the Key Input Interrupt. Note, however, that while input on any pin which has had the PD10_4 to
PD10_7 bits set to "0" (= input mode) is pulled low, inputs on all other pins of the port are not detected as
interrupts.
Pull-up
transistor
KI3
Pull-up
transistor
KI2
Pull-up
transistor
KI1
Pull-up
transistor
KI0
Figure 12.12
Key Input Interrupt
Rev.2.41
Jan 10, 2006
REJ09B0185-0241
http://www.xinpian.net
PU25 bit in
PUR2 register
PD10_7 bit in
PD10 register
PD10_7 bit in PD10 register
PD10_6 bit in
PD10 register
PD10_5 bit in
PD10 register
PD10_4 bit in
PD10 register
Page 121 of 390
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KUPIC register
Key input interrupt
Interrupt control circuit
request
010-62245566 13810019655
12. Interrupt
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