Renesas M16C/62P Series Hardware Manual page 72

M16C/62P Group (M16C/62P, M16C/62PT)
Processor Mode Register 1
b7 b6 b5 b4 b3 b2 b1 b0
0
NOTES :
1. Write to this register after setting the PRC1 bit in the PRCR register to "1" (w rite enable).
2. Set the PM10 bit to "0" for Mask ROM version. For flash memory version, the PM10 bit controls w hether Block A is
enabled or disabled. When the PM10 bit is set to "1", 0F000h to 0FFFFh can be used as internal ROM area.
In addition, the PM10 bit is automatically set to "1" w hile the FMR01 bit in the FMR0 register is set to "1" (CPU
rew rite mode).
3. Effective w hen the PM01 to PM00 bits are set to "01b" (memory expansion mode) or "11b" (microprocessor
mode).
4. PM12 bit is set to "1" by w riting a "1" in a program (w riting a "0" has no effect).
5. When PM17 bit is set to "1" (w ith w ait state), one w ait state is inserted w hen accessing the internal RAM, or
internal ROM.
When PM17 bit is set to "1" and accesses an external area, set the CSiW bit in the CSR register (i=0 to 3) to "0"
(w ith w ait state).
6. The PM13 bit is automatically set to "1" w hen the FMR01 bit in the FMR0 register is "1" (CPU rew rite mode).
7. The access area is changed by the PM13 bit as listed in the table below .
Access Area
RAM
Internal
ROM
External
Figure 7.2 PM1 Register
Rev.2.41 Jan 10, 2006
REJ09B0185-0241
http://www.xinpian.net
(1)
Symbol Address
PM1
Bit Symbol Bit Name
CS2 Area Sw itch Bit
PM10
(Data Block Enable Bit)
Port P3_7 to P3_4 Function Select
PM11
(3)
Bit
Watchdog Timer Function Select Bit
PM12
Internal Reserved Area Expansion
PM13
(6)
Bit
Memory Area Expansion Bit
PM14
PM15
— Reserved Bit
(b6)
(5)
Wait Bit
PM17
PM13=0
Up to Addresses 00400h to 03FFFh (15 Kbytes)
Up to Addresses D0000h to FFFFFh (192 Kbytes)
Address 04000h to 07FFFh are usable
Address 80000h to CFFFFh are usable
Page 57 of 390
提供单片机解密、IC解密、芯片解密业务
0005h
0 : 08000h to 26FFFh (Block A disable)
(2)
1 : 10000h to 26FFFh (Block A enable)
0 : Address output
1 : Port function
0 : Watchdog timer interrupt
1 : Watchdog timer reset
(NOTE 7)
(3)
b5 b4
0 0 : 1-Mbyte mode (Do not expand)
0 1 : Do not set
1 0 : Do not set
1 1 : 4-Mbyte mode
Set to "0".
0 : No w ait state
1 : With w ait state (1 w ait)
The entire area is usable
The entire area is usable
Address 04000h to 07FFFh are reserved
Address 80000h to CFFFFh are reserved
(Memory expansion mode)
7. Processor Mode
After Reset
0X001000b
Function
(4)
PM13=1
010-62245566 13810019655
RW
RW
RW
RW
RW
RW
RW
RW
RW