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M16C/62P Group (M16C/62P, M16C/62PT)
Memory Expansion Mode, Microprocessor Mode
(For setting with no wait)
Read timing
BCLK
t
d(BCLK-CS)
CSi
t
d(BCLK-AD)
ADi
BHE
t
d(BCLK-ALE)
ALE
RD
DBi
Write timing
BCLK
CSi
ADi
BHE
ALE
WR, WRL,
WRH
DBi
1
t
=
cyc
f(BCLK)
Measuring conditions
· V
=V
CC1
CC2
· Input timing voltage : V
· Output timing voltage : V
Figure 23.6
Timing Diagram (4)
Rev.2.41
Jan 10, 2006
REJ09B0185-0241
http://www.xinpian.net
t
h(BCLK-CS)
25ns.max
t
cyc
t
h(BCLK-AD)
25ns.max
t
h(BCLK-ALE)
-4ns.min
25ns.max
t
d(BCLK-RD)
25ns.max
t
ac1(RD-DB)
(0.5 × t
-45)ns.max
cyc
Hi-Z
t
su(DB-RD)
40ns.min
t
d(BCLK-CS)
25ns.max
t
cyc
t
d(BCLK-AD)
25ns.max
t
t
d(BCLK-ALE)
h(BCLK-ALE)
25ns.max
-4ns.min
t
d(BCLK-WR)
Hi-Z
(0.5 × t
=5V
=0.8V, V
=2.0V
IL
IH
=0.4V, V
=2.4V
OL
OH
Page 323 of 390
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4ns.min
4ns.min
t
h(RD-AD)
0ns.min
t
h(BCLK-RD)
0ns.min
t
h(RD-DB)
0ns.min
t
h(BCLK-CS)
t
h(BCLK-AD)
t
h(WR-AD)
(0.5 × t
-10)ns.min
cyc
t
h(BCLK-WR)
25ns.max
0ns.min
t
t
d(BCLK-DB)
h(BCLK-DB)
40ns.max
t
t
d(DB-WR)
h(WR-DB)
(0.5 × t
-40)ns.min
-10)ns.min
cyc
cyc
23. Electrical Characteristics
V
=V
CC1
CC2
4ns.min
4ns.min
4ns.min
010-62245566 13810019655
=5V
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