Renesas M16C/62P Series Hardware Manual page 146

M16C/62P Group (M16C/62P, M16C/62PT)
DMAi Source Pointer (i = 0, 1)
(b23) (b19) (b16) (b15)
b7 b3 b0 b7
NOTES :
1. If the DSD bit in the DMiCON register is "0" (fixed), this register can only be w ritten to w hen the DMAE bit in the
DMiCON register is "0" (DMA disabled).
If the DSD bit is "1" (forw ard direction), this register can be w ritten to at any time.
If the DSD bit is "1" and the DMAE bit is "1" (DMA enabled), the DMAi forw ard address pointer can be read from this
register. Otherw ise, the value w ritten to it can be read.
DMAi Destination Pointer (i = 0, 1)
(b23) (b19) (b16) (b15)
b7 b3 b0 b7
NOTES :
1. If the DAD bit in the DMiCON register is "0" (fixed), this register can only be w ritten to w hen the DMAE bit in the
DMiCON register is "0"(DMA disabled).
If the DAD bit is "1" (forw ard direction), this register can be w ritten to at any time.
If the DAD bit is "1" and the DMAE bit is "1" (DMA enabled), the DMAi forw ard address pointer can be read from this
register. Otherw ise, the value w ritten to it can be read.
DMAi Transfer Counter (i = 0, 1)
(b15) (b8)
b7 b0 b7
Figure 14.5 SAR0, SAR1, DAR0, DAR1, TCR0 and TCR1 Registers
Rev.2.41 Jan 10, 2006
REJ09B0185-0241
http://www.xinpian.net
(1)
(b8)
b0 b7
Set the source address of transfer
Nothing is assigned. When w rite, set "0".
When read, their contents are "0".
(1)
(b8)
b0 b7
Set the destination address of transfer
Nothing is assigned. When w rite, set "0".
When read, their contents are "0".
b0
Symbol
TCR0
TCR1
Set the transfer count minus 1. The w ritten value is stored in the DMAi
transfer counter reload register, and w hen the DMAE bit in the DMiCON
register is set to "1" (DMA enabled) or the DMAi transfer counter
underflow s w hen the DMASL bit in the DMiCON register is "1" (repeat
transfer), the value of the DMAi transfer counter reload register is
transferred to the DMAi transfer counter.
When read, the DMAi transfer counter is read.
Page 131 of 390
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b0
Symbol Address
0022h to 0020h
SAR0
0032h to 0030h
SAR1
Function
b0
Symbol Address
0026h to 0024h
DAR0
0036h to 0034h
DAR1
Function
Address
0029h to 0028h
0039h to 0038h
Function
14. DMAC
After Reset
Indeterminate
Indeterminate
Setting Range RW
00000h to FFFFFh RW
—
After Reset
Indeterminate
Indeterminate
Setting Range RW
00000h to FFFFFh RW
—
After Reset
Indeterminate
Indeterminate
Setting Range RW
0000h to FFFFh
RW
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