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M16C/62P Group (M16C/62P, M16C/62PT)
Table 23.3
Recommended Operating Conditions (2)
Symbol
f(XIN)
Main Clock Input Oscillation Frequency
f(XCIN)
Sub-Clock Oscillation Frequency
f(Ring)
On-chip Oscillation Frequency
f(PLL)
PLL Clock Oscillation Frequency
f(BCLK)
CPU Operation Clock
t
(PLL)
PLL Frequency Synthesizer Stabilization
SU
Wait Time
NOTES:
1. Referenced to V
2. Relationship between main clock oscillation frequency, and supply voltage.
Main clock input oscillation frequency
20 x V
16.0
10.0
0.0
2.7
VCC1[V] (main clock: no division)
Rev.2.41
Jan 10, 2006
REJ09B0185-0241
http://www.xinpian.net
Parameter
(2)
= V
2.7 to 5.5V at T
CC1
CC2 =
opr
-44MHz
CC1
3.0
5.5
Page 306 of 390
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(1)
(2)
V
=3.0V to 5.5V
CC1
V
=2.7V to 3.0V
CC1
V
=3.0V to 5.5V
CC1
V
=2.7V to 3.0V
CC1
V
=5.5V
CC1
V
=3.0V
CC1
= −20 to 85°C / −40 to 85°C unless otherwise specified.
23. Electrical Characteristics
Standard
Min.
Typ.
0
0
32.768
0.5
1
10
10
46.67×V
0
PLL clock oscillation frequency
46.67 x V
-116MHz
CC1
24.0
10.0
0.0
2.7
3.0
VCC1[V] (PLL clock oscillation)
010-62245566 13810019655
Unit
Max.
16
MHz
20×V
MHz
CC1
−44
50
kHz
2
MHz
24
MHz
MHz
CC1
−116
24
MHz
20
ms
50
ms
5.5
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