Renesas M16C/62P Series Hardware Manual page 209

M16C/62P Group (M16C/62P, M16C/62PT)
17.1.1.3 LSB First/MSB First Select Function
Use the UFORM bit in the UiC0 register (i = 0 to 2) to select the transfer format. Figure 17.15 shows the
Transfer Format.
(1) When the UFORM bit in the UiC0 register = 0 (LSB first)
CLKi
TXDi
RXDi
(2) When the UFORM bit = 1 (MSB first)
CLKi
TXDi
RXDi
NOTES:
1. This applies to the case where the CKPOL bit in the UiC0 register = 0
(transmit data output at the falling edge and the receive data taken in
at the rising edge of the transfer clock) and the UiLCH bit in the UiC1
register = 0 (no reverse).
i = 0 to 2
Figure 17.15 Transfer Format
17.1.1.4 Continuous Receive Mode
In continuous receive mode, receive operation becomes enable when the receive buffer register is read. It is not
necessary to write dummy data into the transmit buffer register to enable receive operation in this mode.
However, a dummy read of the receive buffer register is required when starting the operating mode.
When the UiRRM bit (i = 0 to 2) = 1 (continuous receive mode), the TI bit in the UiC1 register is set to "0"
(data present in the UiTB register) by reading the UiRB register. In this case, i.e., UiRRM bit = 1, do not write
dummy data to the UiTB register in a program. The U0RRM and U1RRM bits are the bit 2 and bit 3 in the
UCON register, respectively, and the U2RRM bit is the bit 5 in the U2C1 register.
Rev.2.41 Jan 10, 2006
REJ09B0185-0241
http://www.xinpian.net
D0
D1 D2
D1 D2
D0
D7 D6 D5
D6 D5
D7
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D3 D4 D5 D6
D3 D4 D5 D6
D4 D3 D2 D1
D4 D3 D2 D1
17. Serial Interface
D7
D7
D0
D0
010-62245566 13810019655