Renesas M16C/62P Series Hardware Manual page 203

M16C/62P Group (M16C/62P, M16C/62PT)
UARTi Special Mode Register 4 (i=0 to 2)
b7 b6 b5 b4 b3 b2 b1 b0
NOTES :
1. Set to "0" w hen each condition is generated.
Figure 17.12 UiSMR4 Register
Rev.2.41 Jan 10, 2006
REJ09B0185-0241
http://www.xinpian.net
Symbol
U0SMR4 to U2SMR4
Bit Name
Bit Symbol
Start Condition Generate Bit
STAREQ
Restart Condition Generate Bit
RSTAREQ
Stop Condition Generate Bit
STPREQ
SCL,SDA Output Select Bit
STSPSEL
ACK Data Bit
ACKD
ACK Data Output Enable Bit
ACKC
SCL Output Stop Enable Bit
SCLHI
SCL Wait Bit 3
SWC9
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Address
036Ch, 0370h, 0374h
(1)
0 : Clear
1 : Start
(1)
0 : Clear
1 : Start
(1)
0 : Clear
1 : Start
0 : Start and stop conditions not output
1 : Start and stop conditions output
0 : ACK
1 : NACK
0 : Serial interface data output
1 : ACK data output
0 : Disabled
1 : Enabled
0 : SCL "L" hold disabled
1 : SCL "L" hold enabled
17. Serial Interface
After Reset
00h
Function
010-62245566 13810019655
RW
RW
RW
RW
RW
RW
RW
RW
RW