Renesas M16C/62P Series Hardware Manual page 241

M16C/62P Group (M16C/62P, M16C/62PT)
17.1.6.2 Format
When direct format, set the PRYE bit in the U2MR register to "1", the PRY bit to "1", the UFORM bit in the
U2C0 register to "0" and the U2LCH bit in the U2C1 register to "0". When data are transmitted, data set in the
U2TB register are transmitted with the even-numbered parity, starting from D0. When data are received,
received data are stored in the U2RB register, starting from D0. The even-numbered parity determines whether
a parity error occurs.
When inverse format, set the PRYE bit to "1", the PRY bit to "0", the UFORM bit to "1" and the U2LCH bit to
"1". When data are transmitted, values set in the U2TB register are logically inversed and are transmitted with
the odd-numbered parity, starting from D7. When data are received, received data are logically inversed to be
stored in the U2RB register, starting from D7. The odd-numbered parity determines whether a parity error
occurs.
(1) Direct format
Transfer
clcck
TXD2
(2) Inverse format
Transfer
clcck
TXD2
Figure 17.37 SIM Interface Format
Rev.2.41 Jan 10, 2006
REJ09B0185-0241
http://www.xinpian.net
"H"
"L"
"H"
D0 D1
"L"
"H"
"L"
"H"
D7 D6
"L"
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D2 D3 D4 D5 D6
D5 D4 D3 D2 D1
17. Serial Interface
D7 P
P : Even parity
D0 P
P : Odd parity
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