Timer B - Renesas M16C/62P Series Hardware Manual

M16C/62P Group (M16C/62P, M16C/62PT)
15.2

Timer B

Note
The M16C/62P (80-pin version) and M16C/62PT (80-pin version) do not include TB1IN pin of Timer B1.
[Precautions when using TimerB2]
• Event Counter Mode
• Pulse Period/Pulse Width
Measurement Mode
Figure 15.16 shows a Timer B Block Diagram. Figures 15.17 and 15.18 show registers related to the Timer B.
Timer B supports the following three modes. Use the TMOD1 and TMOD0 bits in the TBiMR register (i = 0 to 5)
to select the desired mode.
•
Timer Mode:
•
Event Counter Mode:
•
Pulse Period/Pulse Width Measurement Mode:
Select Clock Source
TCK1 to TCK0
00
f1 or f2
01
f8
10
f32
11
fC32
TBj Overflow
(Note 1, 2)
Polarity Switching
TBiIN
and Edge Pulse
i=0 to 5
NOTES :
1. Overflows or underflows.
2. j=i-1, however, j=2 when i=0 j=5 when i=3
TCK1 to TCK0, TMOD1 to TMOD0 : Bits in TAiMR register
TBiS : Bits in the TABSR and the TBSR register
Figure 15.16 Timer B Block Diagram
Rev.2.41 Jan 10, 2006
REJ09B0185-0241
http://www.xinpian.net
The external input signals cannot be counted. Set the TCK1 bit in the TB1MR
register to "1" when using the Event Counter Mode.
This mode cannot be used.
The timer counts an internal count source.
The timer counts pulses from an external device or overflows or
underflows of other timers.
The timer measures pulse period or pulse width of an external signal.
00: Timer
10: Pulse Period and Pulse
Width Measurement
TCK1
1
01:
Event Counter
0
Page 156 of 390
提供单片机解密、IC解密、芯片解密业务
TMOD1 to TMOD0
TBiS
Counter Reset Circuit
TBi
Timer B0
Timer B1
Timer B2
Timer B3
Timer B4
Timer B5
15. Timers
High-order Bits of Data Bus
Low-order Bits of Data Bus
8 high-
8 low-order bits
order bits
Reload Register
Counter
Address TBj
0391h 0390h Timer B2
-
0393h 0392h Timer B0
-
0395h 0394h Timer B1
-
0351h 0350h Timer B5
-
0353h 0352h Timer B3
-
0355h 0354h Timer B4
-
010-62245566 13810019655