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M16C/62P Group (M16C/62P, M16C/62PT)
PIN CONFIGURATION (top view)
P1_2/D10
P1_1/D9
P1_0/D8
P0_7/AN0_7/D7
P0_6/AN0_6/D6
P0_5/AN0_5/D5
P0_4/AN0_4/D4
P0_3/AN0_3/D3
P0_2/AN0_2/D2
P0_1/AN0_1/D1
P0_0/AN0_0/D0
P10_7/AN7/KI3
P10_6/AN6/KI2
P10_5/AN5/KI1
P10_4/AN4/KI0
P10_3/AN3
P10_2/AN2
P10_1/AN1
AVSS
P10_0/AN0
VREF
AVCC
P9_7/ADTRG/SIN4
P9_6/ANEX1/SOUT4
P9_5/ANEX0/CLK4
NOTES:
1. P7_0 and P7_1 are N channel open-drain output pins.
2. Use the M16C/62PT on VCC1=VCC2.
Figure 1.8
Pin Configuration (Top View)
Rev.2.41
Jan 10, 2006
REJ09B0185-0241
http://www.xinpian.net
75
74
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77
<VCC2>
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M16C/62P Group
87
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(M16C/62P, M16C/62PT)
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<VCC1>
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100
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Page 19 of 390
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(2)
(2)
Package : PLQP0100KB-A (100P6Q-A)
51
50
P4_2/A18
49
P4_3/A19
48
P4_4/CS0
47
P4_5/CS1
46
P4_6/CS2
45
P4_7/CS3
44
P5_0/WRL/WR
43
P5_1/WRH/BHE
42
P5_2/RD
41
P5_3/BCLK
40
P5_4/HLDA
39
P5_5/HOLD
38
P5_6/ALE
37
P5_7/RDY/CLKOUT
36
P6_0/CTS0/RTS0
35
P6_1/CLK0
34
P6_2/RXD0/SCL0
33
P6_3/TXD0/SDA0
32
P6_4/CTS1/RTS1/CTS0/CLKS1
31
P6_5/CLK1
30
P6_6/RXD1/SCL1
29
P6_7/TXD1/SDA1
P7_0/TXD2/SDA2/TA0OUT
28
27
P7_1/RXD2/SCL2/TA0IN/TB5IN
26
P7_2/CLK2/TA1OUT/V
010-62245566 13810019655
1. Overview
(1)
(1)
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