Block Diagram - Renesas M16C/62P Series Hardware Manual

M16C/62P Group (M16C/62P, M16C/62PT)
1.3

Block Diagram

Figure 1.1 is a M16C/62P Group (M16C/62P, M16C/62PT) 128-pin and 100-pin version Block Diagram,
Figure 1.2 is a M16C/62P Group (M16C/62P, M16C/62PT) 80-pin version Block Diagram.
8
Port P0
Internal peripheral functions
Timer (16-bit)
Output (timer A): 5
Input (timer B): 6
Three-phase motor
control circuit
Watchdog timer
(15 bits)
DMAC
(2 channels)
D/A converter
(8 bits X 2 channels)
<VCC1 ports>
Port P11
(3)
8
NOTES :
1. ROM size depends on microcomputer type.
2. RAM size depends on microcomputer type.
3. Ports P11 to P14 exist only in 128-pin version.
4. Use M16C/62PT on VCC1= VCC2.
Figure 1.1 M16C/62P Group (M16C/62P, M16C/62PT) 128-pin and 100-pin version Block Diagram
Rev.2.41 Jan 10, 2006
REJ09B0185-0241
http://www.xinpian.net
8 8
Port P1 Port P2 Port P3
<VCC2 ports>
(4)
A/D converter
(10 bits
Expandable up to 26 channels)
UART or
clock synchronous serial I/O
(8 bits
CRC arithmetic circuit (CCITT )
(Polynomial : X
M16C/60 series16-bit CPU core
R0H
R1H
R2
R3
A0
A1
FB
<VCC2 ports>
(4)
Port P14 Port P12
(3) (3)
2 8
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8 8 8
Port P4 Port P5
System clock
generation circuit
8 channels
X
PLL frequency synthesizer
On-chip oscillator
3 channels)
X
Clock synchronous serial I/O
16 12 5
+X +X +1)
(8 bits
R0L SB
R1L
USP
ISP
INTB
PC
FLG
(4)
Port P13
(3)
8
8
Port P6
<VCC1 ports>
(4)
XIN-XOUT
XCIN-XCOUT
2 channels)
X
Memory
(1)
ROM
(2)
RAM
Multiplier
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