Renesas M16C/62P Series Hardware Manual page 227

M16C/62P Group (M16C/62P, M16C/62PT)
Table 17.14 STSPSEL Bit Functions
Function
Output of SCLi and SDAi Pins
Start/Stop Condition Interrupt
Request Generation Timing
(1) When Slave
CKDIR=1 (external clock)
STSPSEL bit
SCLi
SDAi
(2) When Master
CKDIR=0 (internal clock), CKPH=1 (clock delayed)
STSPSEL bit
SCLi
SDAi
Figure 17.28 STSPSEL Bit Functions
17.1.3.3 Arbitration
Unmatching of the transmit data and SDAi pin input data is checked synchronously with the rising edge of
SCLi. Use the ABC bit in the UiSMR register to select the timing at which the ABT bit in the UiRB register is
updated. If the ABC bit = 0 (updated bitwise), the ABT bit is set to "1" at the same time unmatching is detected
during check, and is cleared to "0" when not detected. In cases when the ABC bit is set to "1", if unmatching is
detected even once during check, the ABT bit is set to "1" (unmatching detected) at the falling edge of the clock
pulse of 9th bit. If the ABT bit needs to be updated bytewise, clear the ABT bit to "0" (undetected) after
detecting acknowledge in the first byte, before transferring the next byte.
Setting the ALS bit in the UiSMR2 register to "1" (SDA output stop enabled) factors arbitration-lost to occur, in
which case the SDAi pin is placed in the high-impedance state at the same time the ABT bit is set to "1"
(unmatching detected).
Rev.2.41 Jan 10, 2006
REJ09B0185-0241
http://www.xinpian.net
Output of transfer clock and data
Output of start/stop condition is
accomplished by a program using
ports (not automatically generated
in hardware)
Start/stop condition detection
0
1st 2nd 3rd 4th 5th 6th 7th 8th 9th bit
Start condition
detection interrupt
Set to "1" in Set to "0" in
a program a program
1st 2nd 3rd 4th 5th 6th 7th 8th 9th bit
Set STAREQ=1
(start)
Start condition detection
interrupt
Page 212 of 390
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STSPSEL = 0
Set STPREQ=1
(start)
17. Serial Interface
STSPSEL = 1
Output of a start/stop condition
according to the STAREQ,
RSTAREQ and STPREQ bit
Finish generating start/stop
condition
Stop condition
detection interrupt
Set to "1" in Set to "0" in
a program a program
Stop condition detection
interrupt
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