Renesas M16C/62P Series Hardware Manual page 182

6-bit single-chip microcomputer
Table of Contents

Advertisement

M16C/62P Group (M16C/62P, M16C/62PT)
Three-Phase Control Register 0
b7 b6 b5 b4 b3 b2 b1 b0
NOTES :
1.
Set the INVC0 register af ter the PRC1 bit in the PRCR register is set to "1" (write enable).
Rewrite the INV00 to INV02 and INV06 bits when Timers A1, A2, A4 and B2 stop.
2.
Set the INV01 bit to "1" af ter setting the ICTB2 register.
3.
The INV00 and INV01 bits are enabled only when the INV11 bit is set to "1" (three-phase mode 1). The ICTB2 counter is incremented by
one ev ery time Timer B2 underf lows, regardless of INV00 and INV01 bit settings, when the INV11 bit is set to "0" (three-phase mode).
When setting the INV01 bit to "1", set Timer A1 count start f lag bef ore the f irst Timer B2 underf low.
When the INV00 bit is set to "1", the f irst interrupt is generated when Timer B2 underf lows n -1 times, if n is the v alue set in the ICTB2
counter. Subsequent interrupts are generated ev ery n times Timer B2 underf lows.
4.
Set the INV02 bit to "1" to operate the dead time timer, U-, V-and W-phase output control circuits and ICTB2 counter.
5.
When the INVC03 bit is set to "1", the pins applied to U/V/W output three-phase PWM.
__
__
The U, U
, V, V
, W and W
when the f ollowing conditions are all met.
• The INV02 bit is set to "1" (three-phase control timer f unction)
• The INV03 bit is set to "0" (three-phase control timer output disabled)
• Direction registers of each port are set to "0" (input mode)
6.
The INV03 bit is set to "0" when the f ollowings conditions are all met.
• Reset
• A concurrent activ e state occurs while INV04 bit is set to "1"
• The INV03 bit is set to "0" by program
• A signal applied to the NMI
When both the INVC04 and INVC05 bits are set to "1", the INVC03 bit is set to "0".
7.
The INV05 bit can not be set to "1" by program. Set the INV04 bit to "0", as well, when setting the INV05 bit to "0".
8.
The f ollowing table describes how the INV06 bit works.
Item
Mode
Timing to Transf er f rom the IDB0
and IDB1 Registers to Three Phase
Output Shif t Register
Timing to Trigger the Dead Time
Timer when the INV16 Bit=0
INV13 Bit
Transf er trigger : Timer B2 underf lows and write to the INV07 bit, or write to the TB2 register when INV10 = 1
9.
When the INV06 bit is set to "1", set the INV11 bit to "0" (three-phase mode 0) and the PWCON bit in the TB2SC register to "0" (reload
Timer B2 with Timer B2 underf low).
Figure 16.2
INVC0 Register
Rev.2.41
Jan 10, 2006
REJ09B0185-0241
http://www.xinpian.net
(1)
Symbol
Address
0348h
INVC0
Bit Symbol
Bit Name
Interrupt Enable Output
Polarity Select Bit
INV00
Interrupt Enable Output
INV01
(2, 3)
Specification Bit
(4, 5)
Mode Select Bit
INV02
Output Control Bit
INV03
Positiv e and Negativ e-Phases
INV04
Concurrent Activ e Disable
Function Enable Bit
Positiv e and Negativ e-Phases
INV05
Concurrent Activ e Output Detect
(7)
Flag
Modulation Mode
INV06
(8, 9)
Select
Softw are Trigger Select
INV07
___
pins, including pins shared with other output f unctions, are all placed in high-impedance states
_____
pin changes "H" to "L"
Triangular wav e modulation mode
Transf erred once by generating a transf er trigger
af ter setting the IDB0 and IDB1 registers
On the f alling edge of a one-shot pulse of the timer
A1, A2 or A4
Enabled when the INV11 bit=1 and the INV06 bit=0
Page 167 of 390
提供单片机解密、IC解密、芯片解密业务
16. Three-Phase Motor Control Timer Function
0 : The ICTB2 counter is incremented by one on the
(3)
rising edge of Timer A1 reload control signal
1 : The ICTB2 counter is incremented by one on the
f alling edge of Timer A1 reload control signal
0 : ICTB2 counter is incremented by one when Timer B2
underf lows
1 : Selected by the INV00 bit
0 : No three-phase control timer functions
1 : Three-phase control timer function
(5, 6)
0 : Disables three-phase control timer output
1 : Enables three-phase control timer output
0 : Enables concurrent active output
1 : Disables concurrent active output
0 : Not detected
1 : Detected
0 : Triangular w ave modulation mode
1 : Saw tooth w ave modulation mode
Transf er trigger is generated when the INV07 bit is set to "1".
Trigger to the dead time timer is also generated when setting
the INV06 bit to "1". Its v alue is "0" when read.
INV06=0
Sawtooth wav e modulation mode
Transf erred ev ery time a transf er trigger
is generated
By a transf er trigger, or the f alling edge of
a one-shot pulse of the timer A1, A2 or A4
Disabled
After Reset
00h
Function
INV06=1
010-62245566 13810019655
RW
RW
RW
RW
RW
RW
RW
RW
RW

Advertisement

Table of Contents
loading

This manual is also suitable for:

M16c/62pM16c/62pt

Table of Contents