Renesas M16C/62P Series Hardware Manual page 68

M16C/62P Group (M16C/62P, M16C/62PT)
Watchdog Timer Control Register
b7 b6 b5 b4 b3 b2 b1 b0
0
NOTES :
1. Writing to the WDC register factors the WDC5 bit to be set to "1" (w arm start). If the voltage applied to VCC1 is less
than 4.0 V, either w rite to this register w hen the CPU clock frequency is 2 MHz or w rite tw ice.
2. The WDC5 bit is set to "0" (cold start) w hen pow er is turned on and can be set to "1" by program only.
Figure 6.9 WDC Register
Rev.2.41 Jan 10, 2006
REJ09B0185-0241
http://www.xinpian.net
Symbol Address
WDC
Bit Symbol Bit Name
— High-order Bit of Watchdog Timer
(b4-b0)
Cold Start / Warm Start Discrimination
WDC5
(1, 2)
Flag
— Reserved Bit
(b6)
Prescaler Select Bit
WDC7
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000Fh
0 : Cold Start
1 : Warm Start
Set to "0"
0 : Divided by 16
1 : Divided by 128
6. Voltage Detection Circuit
After Reset
(2)
00XXXXXXb
Function
010-62245566 13810019655
RW
RO
RW
RW
RW