Renesas M16C/62P Series Hardware Manual page 234

M16C/62P Group (M16C/62P, M16C/62PT)
Slave control input
Clock input
(CKPOL=0, CKPH=0)
Clock input
(CKPOL=1, CKPH=0)
(1)
Data output timing
Data input timing
NOTES :
1. UART2 output is an N-channel open drain and must be pulled-up externally.
Figure 17.31 Transmission and Reception Timing (CKPH=0) in Slave Mode (External Clock)
Slave control input
Clock input
(CKPOL=0, CKPH=1)
Clock input
(CKPOL=1, CKPH=1)
(1)
Data output timing
Data input timing
NOTES :
Figure 17.32 Transmission and Reception Timing (CKPH=1) in Slave Mode (External Clock)
Rev.2.41 Jan 10, 2006
REJ09B0185-0241
http://www.xinpian.net
"H"
"L"
"H"
"L"
"H"
"L"
"H"
D0
"L"
Indeterminate
"H"
"L"
"H"
"L"
"H"
"L"
"H"
D0
"L"
1. UART2 output is an N-channel open drain and must be pulled-up externally.
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D1 D2 D3 D4
D1 D2 D3 D4
17. Serial Interface
D5 D6 D7
D5 D6 D7
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