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M16C/62P Group (M16C/62P, M16C/62PT)
Timer Ai Mode Register (i=0 to 4)
(when not using two-phase pulse signal processing)
b7 b6 b5 b4 b3 b2 b1 b0
0
0 1
NOTES :
1.
During event counter mode, the count source can be selected using the ONSF and TRGSR registers.
2.
TA0OUT pin is N-channel open drain output.
3.
Effective w hen the TAiTGH and TAiTGL bits in the ONSF or TRGSR register are "00b" (TAiIN pin input).
4.
Count dow n w hen input on TAiOUT pin is low or count up w hen input on that pin is high. The port direction bit for
TAiOUT pin is set to "0" (= input mode).
Figure 15.9
TAiMR Register in Event Counter Mode (when not using two-phase pulse signal
processing)
Rev.2.41
Jan 10, 2006
REJ09B0185-0241
http://www.xinpian.net
Symbol
0396h to 039Ah
TA0MR to TA4MR
Bit Name
Bit Symbol
TMOD0
Operation Mode Select Bit
TMOD1
Pulse Output Function Select Bit
MR0
Count Polarity Select Bit
MR1
Up/Dow n Sw itching Factor
MR2
Select Bit
MR3
Set to "0" in event counter mode
Count Operation Type Select Bit
TCK0
TCK1
Can be "0" or "1" w hen not using tw o-phase pulse signal processing
Page 147 of 390
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Address
b1 b0
0 1 : Event counter mode
0 : Pulse is not output
(TAiOUT pin functions as I/O port)
1 : Pulse is output
(TAiOUT pin functions as pulse output pin)
(3)
0 : Counts falling edge of external signal
1 : Counts rising edge of external signal
0 : UDF register
1 : Input signal to TAiOUT pin
0 : Reload type
1 : Free-run type
After Reset
00h
Function
(1)
(2)
(4)
010-62245566 13810019655
15. Timers
RW
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RW
RW
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