Table Of Special Data Registers For Fp0 - Panasonic FP-E Programming Manual

5.1.3 Table of Special Data Registers for FP0

The special data registers are one word (16-bit) memory areas which store specific information. With the
exception of registers for which "Writing is possible" is indicated in the "Description" column, these
registers cannot be written to.
Address
FP0 C10,
FP0 T32 C14, C16,
C32, SL1
DT90000 DT9000
DT90010 DT9010
DT90014 DT9014
DT90015 DT9015
DT90016 DT9016
DT90017 DT9017
DT90018 DT9018
DT90019 DT9019
5-18
Phone: 800.894.0412 - Fax: 888.723.4773 - Web: www.clrwtr.com - Email: info@clrwtr.com
Name
Self-diagnostic error
code
I/O verify error unit
Auxiliary register for
operation
Auxiliary register for
operation
Operation error
address (hold)
Operation error
address (non-hold )
2.5 ms ring counter
Descriptions
The self-diagnostic error code is stored here
when a self-diagnostic error occurs. Monitor the
error code using decimal display.
The position of the I/O for which an error
occurred is stored in bits 0 to 3.
One shift-out hexadecimal digit is stored in bit
positions 0 to 3 when F105 (BSR) or F106 (BSL)
instruction is executed.
The divided remainder (16-bit) is stored in
DT9015/DT90015 when F32(%) or F52(B%)
instruction is executed.
The divided remainder (32-bit) is stored in
DT9015 and DT9016/DT90015 and DT90016
when F33(D%) or F53(DB%) instruction is
executed.
After commencing operation, the address where
the first operation error occurred is stored.
Monitor the address using decimal display.
The address where an operation error occurred
is stored. Each time an error occurs, the new
address overwrites the previous address. At the
beginning of scan, the address is 0. Monitor the
address using decimal display.
The data stored here is increased by one every
2.5 ms. (H0 to HFFFF)
Difference between the values of the two points
(absolute value) x 2.5 ms = Elapsed time
between the two points.