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Panasonic FP-E Programming Manual

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Phone: 800.894.0412 - Fax: 888.723.4773 - Web: www.clrwtr.com - Email: info@clrwtr.com

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  Summary of Contents for Panasonic FP-E

  • Page 1 Phone: 800.894.0412 - Fax: 888.723.4773 - Web: www.clrwtr.com - Email: info@clrwtr.com...
  • Page 2 Phone: 800.894.0412 - Fax: 888.723.4773 - Web: www.clrwtr.com - Email: info@clrwtr.com...
  • Page 3: Table Of Contents

    Table of Contents Chapter 1 Relays, Memory Areas and Constants 1 - 2 Table of Relays, Memory Areas and Constants ......1 - 2 1.1.1 FP0/FP−e...
  • Page 4 Table of Contents 1 - 79 1.4.4 BCD Type Real Numbers (H) (for FP2, FP2SH and FP10SH) . . . 1 - 80 1.4.5 Character Constants (M) ........1 - 81 Data Ranges Which can be Handled in the PLC .
  • Page 5 Table of Contents 4 - 16 4.4.2 Operation Mode when an Operation Error Occurs ... . . 4 - 17 4.4.3 Dealing with Operation Errors ......4.4.4 Points to Check in Program .
  • Page 6 Table of Contents 5.1.18 Special Data Registers for FP2/FP2SH/FP3/FP10SH ..5−176 5.2 Table of Basic Instructions ......... 5−201 5.3 Table of High−level Instructions .
  • Page 7 Table of Contents Basic Instructions Sequence basic instructions On−delay timer TMX ..2 − 42 On−delay timer TMY ..2 − 42 Start ....2 −...
  • Page 8 Table of Contents Special setting instructions STF> Floating point real number data comparison: (Start) ..2 − 140 SYS1 Communication conditions STF>= Floating point real number data setting ....2 −...
  • Page 9 Table of Contents OR<> 16−bit data compare (OR) ....2 − 148 OR> 16−bit data compare (OR) ....2 −...
  • Page 10 Table of Contents High−level Instructions Data transfer instructions 16-bit data move ......... . 3 −...
  • Page 11 Table of Contents Control instruction Auxiliary jump ......... . 3 −...
  • Page 12 Table of Contents 8-digit BCD data addition ....... . 3 − 97 PDB+ 4-digit BCD data addition .
  • Page 13 Table of Contents 16-bit data OR ........3 −...
  • Page 14 Table of Contents 16-bit data sign extension ....... 3 − 200 PEXT DECO Decode...
  • Page 15 Table of Contents F113 WBSL Left shift of one hexadecimal digit (4-bit) of 16−bit data range 3 − 252 P113 PWBSL FIFO instructions F115 FIFT FIFO buffer definition ........3 −...
  • Page 16 Table of Contents F136 DBCU Number of on (1) bits in 32-bit data ..... . . 3 − 300 P136 PDBCU Basic function instruction F137...
  • Page 17 Table of Contents F157 CADD Time addition ......... 3 −...
  • Page 18 Table of Contents F175 SPSH Pulse output (Linear interpolation) ..... . . 3 − 542 F175 SPSH Pulse output (Linear interpolation) .
  • Page 19 Table of Contents F238 DGBIN 32−bit Gray code → 32−bit binary data ....3 − 596 P238 PDGBIN F240 COLM Bit line to bit column conversion .
  • Page 20 Table of Contents F278 DSORT Sort data in 32-bit data table ......3 − 649 P278 PDSORT F282...
  • Page 21 Table of Contents F313 Floating point data division ......3 − 689 P313 F314 Floating point data Sine operation...
  • Page 22 Table of Contents F336 FABS Floating point real number data absolute ....3 − 735 P336 PFABS F337 Floating point real number data conversion of angle units P337 PRAD (Degrees →...
  • Page 23 Table of Contents F412 POPB Restoring the index register bank number ....3 − 784 P412 PPOPB File register bank processing instructions F414 SBFL Setting the file register bank number .
  • Page 24 Phone: 800.894.0412 - Fax: 888.723.4773 - Web: www.clrwtr.com - Email: info@clrwtr.com...
  • Page 25: Chapter 1 Relays, Memory Areas And Constants

    Chapter 1 Relays, Memory Areas and Constants Phone: 800.894.0412 - Fax: 888.723.4773 - Web: www.clrwtr.com - Email: info@clrwtr.com...
  • Page 26: Table Of Relays, Memory Areas And Constants

    Relays, Memory Areas and Constants Table of Relays, Memory Areas and Constants 1.1.1 FP0/FP−e Numbering Item Function C10/C14 C32/SL1 T32C /C16 Relay External input (X) 208 points (X0 to X12F) Turns on/off based on external input. relay External output (Y) 208 points (Y0 to Y12F) Externally outputs on/off state.
  • Page 27 Table of Relays, Memory Areas and Constants Item Item Numbering Function Function C10/C14 C32/SL1 T32C /C16 Constant Decimal (K) K−32768 to K32767 (for 16-bit operation) constants K−2147483648 to K2147483647 (for 32-bit operation) Hexadecimal (H) H0 to HFFFF (for 16-bit operation) constants H0 to HFFFFFFFF (for 32-bit operation) −38...
  • Page 28 Relays, Memory Areas and Constants FP−e Item Number Memory area available for use Function of points Matsushita X0−X12F %IX0.0− Turns on or off based on External input relay %IX12.15 external input. (see note 3) External output relay Y0−Y12F %QX0.0− Outputs on or off state (see note 3) %QX12.15 externally.
  • Page 29 Table of Relays, Memory Areas and Constants Item Number of Memory area available for use Function points Matsushita External input relay 6 double DWX0−DWX11 %ID0− Code for specifying 32 external (see note 3) words %ID11 input points as a double word (32 bits) of data.
  • Page 30 Relays, Memory Areas and Constants Notes 1) The points for the timer and counter can be changed by the setting of System register No. 5. The number given in the table above are the numbers when System register No. 5 is at its default setting.
  • Page 31: Fp0R

    Table of Relays, Memory Areas and Constants 1.1.2 FP0R Item Number of points and range of Function memory area available for use C10, C14, C16 C32, T32, F32 Relay External input 1760 points (X0 to X109F) Turns on or off based on external input. Note1) External output (Y)
  • Page 32 Relays, Memory Areas and Constants Item Item Number of points and range of Function Function memory area available for use C10, C14, C16 C32, T32, F32 Control Master control 256 points instruc- relay points tion tion (MCR) point Number of 256 points labels (JP and LOOP)
  • Page 33: Fpσ

    Table of Relays, Memory Areas and Constants 1.1.3 FPΣ 12k type Item Number Memory area available for use Function of points X0−X31F Turns on or off based on External input relay external input. (see note 1) FPG−C32T/C32TTM 1184 X0−X73F External input relay (see note 1) FPG−C32T2/C32T2TM FPG−C24R2/C24R2TM...
  • Page 34 Relays, Memory Areas and Constants Item Number of Memory area available for use Function points Data register 32765 words DT0−DT32764 Data memory used in a program. Data is handled in (see note 2) 16-bit units (one word). Link data register 128 words LD0−LD127 A shared data memory which...
  • Page 35 Table of Relays, Memory Areas and Constants 32k type Item Number of points and range of Function memory area available for use 32TH/C32THTM C32T2H/C32T2HTM C24R2H/C24R2HTM C28P2H/C28P2HTM External input 1184 points (X0 to X73F) Turns on or off based on external input. (see note 1) (X) External output (see 1184 points (Y0 to Y73F)
  • Page 36 Relays, Memory Areas and Constants Item Number of points and range of Function memory area available for use 32TH/C32THTM C32T2H/C32T2HTM C24R2H/C24R2HTM C28P2H/C28P2HTM Master control relay points (MCR) Number of labels (JP and LOOP) Number of step 1,000 stages ladders 100 subroutines Number of subrou- tines Number of interrupt...
  • Page 37: Fp−X

    Table of Relays, Memory Areas and Constants 1.1.4 FP−X Item Number of points and range of Function memory area available for use C30, C60 Relay External input 1760 points (X0 to X109F) Turns on or off based on external input. Note1) External output (Y)
  • Page 38 Relays, Memory Areas and Constants Item Item Number of points and range of Function Function memory area available for use C30, C60 Control Differential Unlimited points instruc- instruc points tion Master con- 256 points point trol relay points (MCR) Number of 256 points labels (JP and LOOP)
  • Page 39: Fp2

    Table of Relays, Memory Areas and Constants 1.1.5 Item Numbering Function Relay External input (X) 2,048 points Turn on or off based on external input. relay (X0 to X127F) External (Y) 2,048 points Externally outputs on or off state. output relay (Y0 to Y127F) Internal relay (R) 4,048 points...
  • Page 40 Relays, Memory Areas and Constants Item Numbering Control Master control relay 256 points points (MCR) instruc- tion Number of labels (JP and Total: 256 points point LOOP) Number of step ladder 1,000 steps (* Note 4) Number of subroutine 100 subroutines Number of interrupt 1 program (periodical interrupt: allows setting of the time interval within the program...
  • Page 41: Fp2Sh

    Table of Relays, Memory Areas and Constants 1.1.6 FP2SH Item Numbering Function Relay External input (X) 8,192 points (X0 to X511F) Turn on or off based on external input. relay External output (Y) 8,192 points (Y0 to Y511F) Externally outputs on or off state. relay Internal relay (R) 14.192 points (R0 to R886F)
  • Page 42 Relays, Memory Areas and Constants Item Numbering Function Memory Special data (DT) 512 words (DT90000 to Data memory for storing specific data. area register DT90511) Various settings and error codes are stored. Index register (I) 14 words ×16 banks (I0 to ID) Register can be used as an address of memory area and constants modifier.
  • Page 43: Fp10Sh

    Table of Relays, Memory Areas and Constants 1.1.7 FP10SH Item Numbering Function Relay External input (X) 8,192 points (X0 to X511F) Turn on or off based on external input. relay External output (Y) 8,192 points (Y0 to Y511F) Externally outputs on or off state. relay Internal relay (R) 14,192 points (R0 to R886F)
  • Page 44 Relays, Memory Areas and Constants Item Item Numbering Numbering Function Function Memory Special data (DT) 512 words Data memory for storing specific data. area register (DT90000 to DT90511) Various settings and error codes are stored. Index register (I) 14 words ×16 banks (I0 to ID) Register can be used as an address of memory area and constants modifier.
  • Page 45: Relay Numbers

    Table of Relays, Memory Areas and Constants 1.1.8 Relay Numbers External input relays (X), External output relays (Y), Internal relays (R), Link relays (L) and Pulse relays (P) Since these relays are handled in units of 16 points, they are expressed as a combination of decimal and hexadecimal numbers as shown below.
  • Page 46 Relays, Memory Areas and Constants External input relay (X) and External output relay (Y) Only relays with numbers actually allocated to input contacts can be used as external input relay (X). Only relays with numbers actually allocated to output contacts can output as external output relay (Y).
  • Page 47 Table of Relays, Memory Areas and Constants Relation of WX, WY, WR and WL to X, Y, R and L WX, WY WR and WL correspond respectively to groups of 16 external input relay (X) points, 16 external output relay (Y) points, 16 internal relay (R) points and 16 link relay (L) points.
  • Page 48: Explanation Of Relays

    Relays, Memory Areas and Constants Explanation of Relays 1.2.1 External Input Relays (X) Function of external input relays (X) This relay feeds signals to the programmable controller from an external device such as a limit switch or a photoelectric sensor. Program X contact: on Input...
  • Page 49: External Output Relays (Y)

    Explanation of Relays 1.2.2 External Output Relays (Y) Function of external output relays (Y) This relay outputs the program execution result of the programmable controller and activates an external device (load) such as a solenoid, operating panel or intelligent unit. The on or off status of the external output relay is output as a control signal.
  • Page 50: Internal Relays (R)

    Relays, Memory Areas and Constants 1.2.3 Internal Relays (R) Function of internal relays (R) This relay can be used only within program and on or off status does not provide an external output. When the coil of the relay is energized, its contacts turn on. Internal relay F0 MV...
  • Page 51 Explanation of Relays Non−hold type relay and hold type relay There are two types of internal relays: hold type relays and non−hold type relays. When the power is turned off or the mode changed from RUN to PROG., − Hold type relays hold their on or off status and resume operation in that status when the system is restarted.
  • Page 52: Special Internal Relays

    Relays, Memory Areas and Constants 1.2.4 Special Internal Relays Function of special internal relays The special internal relays turn on or off under specific conditions. The on or off state is not externally output and only functions within the program. The principal special internal relays are as follows: Operation status flags: Operation status is indicated by on or off.
  • Page 53: Link Relays (L) For Fpσ, Fp−X, Fp0R

    Explanation of Relays 1.2.5 Link Relays (L) for FPΣ, FP−X, FP0R Function of link relays (L) Link relays are relays used for the PC Link, that can be shared between multiple programmable controllers when they are connected using a PLC link. If calculation results are output to the link relay (coil) of a certain PLC, the results are also sent to other PLC connected with MEWNET, and will be reflected in link relay (contact) that have the same number.
  • Page 54 Relays, Memory Areas and Constants Specifying hold type and non−hold type relays There are two types of link relays, which can be switched when the power is turned off and the mode is switched from RUN to PROG and operation is stopped. Hold type relays, which hold the on or off status in effect immediately prior to stopping, during the period between stopping and resuming operation Non−hold type relays, which are reset when operation stops...
  • Page 55: Link Relays (L) For Fp2/Fp2Sh/Fp10Sh

    Explanation of Relays 1.2.6 Link Relays (L) for FP2/FP2SH/FP10SH Function of link relays (L) Link relays are relays used for the PC Link, that can be shared between multiple programmable controllers when they are connected using a MEWNET link. The following types of MEWNET links are available. −...
  • Page 56 Relays, Memory Areas and Constants Available range of link relays The available range of link relays varies depending on the type of network and the combination of units. The available range and number of points must be specified separately for each network. For MEWNET−W and MEWNET−P: A maximum of 1,024 points are available with one link unit.
  • Page 57 Explanation of Relays Specifying hold type and non−hold type relays There are two types of link relays, which can be switched when the power is turned off and the mode is switched from RUN to PROG and operation is stopped. Hold type relays, which hold the on or off status in effect immediately prior to stopping, during the period between stopping and resuming operation Non−hold type relays, which are reset when operation stops...
  • Page 58 Relays, Memory Areas and Constants Usage restrictions When used as contacts, there are no restrictions on the number of times that can be used. As a rule, when specified as the output destination for operation results of OT instruction and KP instruction, use is limited to once in a program (to inhibit double output). Notes System register 20 can be used to permit double output.
  • Page 59: Timer (T)

    Explanation of Relays 1.2.7 Timer (T) Function of timers (T) When a timer is activated and the set time elapses, the timer contact with the same number as the timer turns on. When the timer is in the time−up state and the timer execution condition turns off, the timer contact turns off.
  • Page 60: Counter (C)

    Relays, Memory Areas and Constants 1.2.8 Counter (C) Function of counters (C) When the decrement−type preset counter is activated and the elapsed value reaches zero, the counter contact with the same number as the counter turns on. When the counter’s reset input is turned on, the counter contact turns off. Counter number Count input Reset input...
  • Page 61: Items Shared By The Timer And Counter

    Explanation of Relays 1.2.9 Items Shared by the Timer and Counter Timer and counter partitioning Timers and counters share the same area. The partitioning of the area can be changed to obtain the number of timers or counters needed. Partition the area by setting system register 5. If the initial number of the counter is specified, those prior to that point will be timers, and those subsequent to that point will be counters.
  • Page 62 Relays, Memory Areas and Constants Even if specifying for the unit without batteries, the data will be indefinite. Non-hold type Value of system register 6 (initial number of hold type) Hold type Default settings for hold types and non−hold types Type Non−hold type Hold type...
  • Page 63: Pulse Relays (P)

    Explanation of Relays 1.2.10 Pulse Relays (P) Note Pulse relays (P) can only be used with the FP2/FP2SH/FP10SH. Function of pulse relays (P) A pulse relay (P) goes on for one scan only. The on or off state is not externally output and only operates in the program.
  • Page 64 Relays, Memory Areas and Constants Usage restrictions Pulse relays are cleared when the power is turned off. A pulse relay can only be used once in a program as an output destination for an OT↑ or OT↓ instruction (double output is prohibited). There is no limitation to the number of times a pulse relay can used as a contact.
  • Page 65: Error Alarm Relays (E)

    Explanation of Relays 1.2.11 Error Alarm Relays (E) Note Error alarm relays can only be used with the FP2SH/FP10SH. Function of error alarm relays (E) Error alarm relays are used to feed back error conditions freely assigned by the user to internal relays, and to store them in memory.
  • Page 66 Relays, Memory Areas and Constants Example: If X0 goes on when an error occurs Set E15 X0 : on No. of error alarm relays DT90400 which are on DT90401 Relay numbers DT90402 of error alarm relay which are DT90403 DT90404 DT90405 Data of calen- dar timer which...
  • Page 67 Explanation of Relays Clearing buffer areas and initial data Of the areas in which relay numbers are stored, only DT90400 and DT90401 can be cleared by directly specifying the special data register with the RST instruction. If DT90400 is specified, all error information in the buffer is cleared, and if DT90401 is specified, the initial relay number in the buffer area is cleared.
  • Page 68: Explanation Of Memory Areas

    Relays, Memory Areas and Constants Explanation of Memory Areas 1.3.1 Data Register (DT) Function of data registers (DT) Data registers are memory areas which are handled in word (16−bit) units, and are used to store data such as numerical data configured of 16 bits. Bit position 15 1211 ·...
  • Page 69 Explanation of Memory Areas Non−hold type data and hold−type data There are two types of data registers which handle data differently when the power is turned off or the mode is changed from RUN to PROG.: − Hold type data registers hold their contents while operation stops and allow operation to be restarted with the contents still effective.
  • Page 70: Special Data Registers (Dt)

    Relays, Memory Areas and Constants Note With the FP2SH/FP10SH, system register 4 can be set in such a way that the data registers are not cleared even if the Initialize/ Test switch is set to the upper side. 1.3.2 Special Data Registers (DT) Function of the special data registers These data registers have specific applications.
  • Page 71 Explanation of Memory Areas Clock/calendar (can be used with all types of the FP0 T32C, FP0R, FP−e, FPΣ, FP−X, FP2, FP2SH and FP10SH) The year, month, day, hour, minute, second, and day of the week tracked by the calendar timer are stored here (DT9053 to DT9057/DT90053 to DT90057). Note The values stored for the clock/calendar can be overwritten (to calibrate the date and time).
  • Page 72: File Registers (Fl)

    Relays, Memory Areas and Constants 1.3.3 File Registers (FL) Function of file registers (FL) File registers are memory areas which are handled in word (16−bit) units, and are used to store data such as numerical data configured of 16 bits. They can be used in exactly the same way as data registers.
  • Page 73: Wx, Wy, Wr And Wl

    Explanation of Memory Areas 1.3.4 WX, WY, WR and WL Function of WX, WY, WR and WL Relays (X, Y, R, L) can be handled as blocks of 16 points. These are one−word (16−bit) memory areas, thus they can be treated as data memory. The composition of the one−word memory areas is as follows.
  • Page 74: Link Data Registers (Ld) For Fpσ/Fp−X/Fp0R

    Relays, Memory Areas and Constants 1.3.5 Link Data Registers (LD) for FPΣ/FP−X/FP0R Function of link data registers (LD) Link data registers are data memories for “PC links”, which are shared between multiple programmable controllers which are connected through the same network link. When data is written to a link data register of one PLC, the contents are stored in the link data registers that have the same numbers, in other PLCs connected through the network.
  • Page 75 Explanation of Memory Areas Specifying hold type and non−hold type registers There are two types of link data registers, which can be switched when the power is turned off and the mode is switched from RUN to PROG and operation is stopped. −...
  • Page 76: Link Data Registers (Ld) For Fp2/Fp2Sh/Fp10Sh

    Relays, Memory Areas and Constants 1.3.6 Link Data Registers (LD) for FP2/FP2SH/FP10SH Function of link data registers (LD) Link data registers are data memories for “PC links”, which are shared between multiple programmable controllers which are connected through the same MEWNET link. The following types of MEWNET links are available.
  • Page 77 Explanation of Memory Areas Available range of link data registers The available range of link data registers varies depending on the type of network and the combination of units. The available range and number of points must be specified separately for each network. For MEWNET−W and MEWNET−P: A maximum of 128 words can be used with one link unit.
  • Page 78 Relays, Memory Areas and Constants Specifying hold type and non−hold type registers There are two types of link data registers, which can be switched when the power is turned off and the mode is switched from RUN to PROG and operation is stopped. −...
  • Page 79 Explanation of Memory Areas Example: Non−hold type System register 12 Hold type LD127 Non−hold type LD128 System register 13 Hold type LD255 Non−hold type LD256 System LD8447 register 17 Hold type Note Link data registers must be allocated when the network is configured, before programming is done.
  • Page 80: Set Value Area For Timer/Counter (Sv)

    Relays, Memory Areas and Constants 1.3.7 Set Value Area for Timer/Counter (SV) Function of set value areas (SV) A set value for a timer or counter is stored in the set value area (SV) with the same number as the timer or counter. Set value TM n, K30 (Decimal number)
  • Page 81: Elapsed Value Area For Timer/Counter (Ev)

    Explanation of Memory Areas 1.3.8 Elapsed Value Area for Timer/Counter (EV) Function of elapsed value areas (EV) While a timer or counter is operating, the elapsed value is stored in the elapsed value area (EV) with the same number as the timer or counter. When the EV reaches zero, the timer or counter contact with the same number turns An EV is a one−word, 16−bit memory area which stores a decimal number from K0 to K32767.
  • Page 82: Index Registers (Ix, Iy) (For Fp0, Fp−E)

    Relays, Memory Areas and Constants 1.3.9 Index Registers (IX, IY) (for FP0, FP−e) Function of index registers (IX, IY) Index registers are used to indirectly specify constants and memory area addresses. Two 16−bit registers are available, IX and IY. Changing addresses and constants using a value in an index register is called “index modification”.
  • Page 83 Explanation of Memory Areas Index modification method Example 1: Modifying a destination address F0 MV, DT 0, IX IX setting F0 MV, K100, IXWR0 The value of DT0 determines the WR address where K100 is written. When the DT0 value is K10, K100 is written to WR10. →...
  • Page 84 Relays, Memory Areas and Constants Cautions when using index registers An index register can not be modified with an index register. IXIX, IXIY If the result of address modification overflows the memory area, an operation error will result. When the address resulting from modification is negative or a large number. When modifying 32−bit constants, IX is specified.
  • Page 85: Index Registers (I0 To Id) (For Fpσ/Fp−X/Fp0R)

    Explanation of Memory Areas 1.3.10 Index Registers (I0 to ID) (for FPΣ/FP−X/FP0R) Function of index registers (I0 to ID) Index registers are used for indirect specification of values to addresses and operands in relays and memory areas. There are a total of 14 index registers which can be used with the FPΣ, consisting of I0 to I9 and IA to ID.
  • Page 86: Index Registers (I0 To Id) (For Fp2, Fp2Sh And Fp10Sh)

    Relays, Memory Areas and Constants 1.3.11 Index Registers (I0 to ID) (for FP2, FP2SH and FP10SH) Function of index registers (I0 to ID) Index registers are used for indirect specification of values to addresses and operands in relays and memory areas. Changing an address or a constant using an index register value is called “index modification”.
  • Page 87 Explanation of Memory Areas The following index modifications are possible Memory area numbers used with high-level instructions K constants (16-bit and 32-bit) and H constants (16-bit and 32-bit) specified with high-level instructions Relay numbers used with the following basic instructions: ST, ST/, AN, AN/, OR, OR/, OT, KP, SET, RST, OT↑, OT↓...
  • Page 88 Relays, Memory Areas and Constants Modification of memory area numbers specified by high−level instructions Address = Base address + value in I0 through ID (K constant) Example: Modifying DT11 I0DT11 Base address I0 value Target address DT11 DT21 K−10 Example 1: Modifying a destination address F0 MV, DT 0, I0 I0 setting F0 MV, K100, I0DT100...
  • Page 89 Explanation of Memory Areas Modification of values of constants specified by high−level instructions Constant = Base value + value in I0 through ID Example 1: Modifying 16-bit constant K100 I0K100 Base value I0 value 16-bit constant K100 K100 K100 K110 K100 K−10 Example 2: Modifying 16-bit constant H10...
  • Page 90 Relays, Memory Areas and Constants Modification of relay numbers specified by basic instructions Number = Base number + value in I0 through ID (K constant / H constant) Example: Modifying X10 IAX10 Base number IA value Target number H−10 K−11 Example 1: Modifying a trigger F0 MV, DT 0, I0 I0 setting...
  • Page 91 Explanation of Memory Areas Example 3: Modifying a destination address F0 MV, DT 0, I0 I0 setting F0 MV, K100, I0WR0 The value of DT0 determines the address of WR where K100 is written. When the value of DT0 is K10, K100 is written to WR10. WR10 →...
  • Page 92 Relays, Memory Areas and Constants Items requiring particular attention For the external input relay (X), external output relay (Y), and internal relay (R), when using index modification on relay numbers, be aware that the last digit of the relay number is hexadecimal and the first digits are decimal. Example: For external input relay (X) ×...
  • Page 93 Explanation of Memory Areas Modifying instruction numbers of basic instructions Timer numbers Modifying TML20 −−− TML I020 Counter numbers Modifying CT3000 −−− CT I03000 Shift register numbers Modifying SRWR0 −−− SR I0WR0 Master control numbers Modifying MCE1 −−− MCE I01 Label number specification with the Jump instruction Modifying JP1 −−−...
  • Page 94 Relays, Memory Areas and Constants Changing index register banks (for FP2SH/FP10SH only) The banks of the index registers of the FP2SH/FP10SH can be changed to allow use of up to 224 points (14 points × 16 banks) in a program. Bank Bank Bank...
  • Page 95 Explanation of Memory Areas Example 1: Changing banks using a register bank setting instruction F410 (SETB) I0 to ID of bank 0 R9010 F410 SETB, H 1 F410 SETB, H 1 I0 to ID of bank 1 R9010 F410 SETB, H 2 I0 to ID of bank 2 R9010...
  • Page 96: Explanation Of Constants

    Relays, Memory Areas and Constants Explanation of Constants 1.4.1 Integer Type Decimal Constants (K) Function of decimal constants (K) This is binary data that has been converted to the decimal format. When entering and reading a decimal constant, specify the value by entering a K at the beginning.
  • Page 97: Hexadecimal Constants (H)

    Explanation of Constants 1.4.2 Hexadecimal Constants (H) Function of hexadecimal constants (H) Hexadecimal constants are values which have been converted from binary into hexadecimal. When entering and reading a hexadecimal constant, specify the value by entering an H at the beginning. Hexadecimal constants are primarily used to specify an ordering of 1’s and 0’s in 16−bit data, such as system register settings and specification of control data for high−level instructions.
  • Page 98: Floating Point Type Real Numbers (F)

    Relays, Memory Areas and Constants 1.4.3 Floating Point Type Real Numbers (f) Available PLC FP0, FP0R, FP−e, FPΣ, FP−X, FP2, FP2SH and FP10SH Range of floating point type real numbers that can be used in operations The range of floating point type real numbers that can be stored in the memory area is as noted below.
  • Page 99 Explanation of Constants Processing of floating point type real number operations 1) Processing by specifying an integer device Instructions can be used to store data in a specific location. Adding the symbol % or # to either S (source: the area from which the data is loaded) or D (destination: the area in which the result is stored) determines how the data is processed.
  • Page 100 Relays, Memory Areas and Constants In processing involving an integer device specification and real numbers being converted to integers, the processing is the same as that of the F327 (INT) instruction. If the real−number data is a positive number, the number is rounded off, and any digits to the right of the decimal point are discarded.
  • Page 101 Explanation of Constants Example 2: When conversion is carried out by rounding down the digits to the right of the decimal point converted to F329 FIX, DT0, DT10 16−bit integer converted to F330 DFIX, DT0, DT10 32−bit integer Digits to the right of the decimal point are rounded down. If the real−number data is 1.5, it is converted as integer data If the real−number data is −1.5, it is converted as integer data K−1.
  • Page 102 Relays, Memory Areas and Constants 3) Direct specification of the real−number constant data When operations are being carried out on real−number constants as real−number data, the values can be directly input by using a programming tool in which “f” is added either to the target data “S”...
  • Page 103: Bcd Type Real Numbers (H) (For Fp2, Fp2Sh And Fp10Sh)

    Explanation of Constants 1.4.4 BCD Type Real Numbers (H) (for FP2, FP2SH and FP10SH) Range of BCD type real numbers that can be used in operations The range of real−number data that can be stored in the memory area is as noted below. −9999.9999 to +9999.9999 Data stored in the memory area in one−word units, with the positive/negative sign coming first, followed by the integer segment and then by the decimal point and any...
  • Page 104: Character Constants (M)

    Relays, Memory Areas and Constants 1.4.5 Character Constants (M) Function of character constants (M) The character constant is used to express ASCII code in binary. The character constant is expressed by adding the prefix M to the data. There are only two instructions in which character constants can be specified, F95 (ASC) instruction, F257 to F265 (SYS1) instruction and F149 (MSG) instruction.
  • Page 105: Data Ranges Which Can Be Handled In The Plc

    1.5 Data Ranges Which can be Handled in the PLC Data Ranges Which can be Handled in the PLC 1.5.1 Data Ranges Which can be Handled in the PLC 16−bit data Decimal Hexadecimal Data which can be handled in the PLC (16−bit binary data) constants constants 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1...
  • Page 106 Relays, Memory Areas and Constants Expression of decimal numbers in PLC Decimal number is basically processed in 16-bit or 32-bit binary. The most significant bit (MSB) expresses negative or positive sign of the data. When the MSB is “0”, data is regarded as having a zero or positive value and when the MSB is “1”, data is regarded as having a negative value.
  • Page 107 1.5 Data Ranges Which can be Handled in the PLC Data ranges which can be handled in the PLC Binary data which can be handled by programmable controllers are: 16-bit binary data: K-32768 to K32767 32-bit binary data: K-2147483648 to K2147483647 BCD code which can be handled by programmable controllers are: 16-bit (4-digit BCD H code): H0 to H9999 32-bit (8-digit BCD H code): H0 to H99999999...
  • Page 108: Overflow And Underflow

    Relays, Memory Areas and Constants 1.5.2 Overflow and Underflow Operation instructions occasionally produce a value which is outside of the allowed range. This is called overflow if the value exceeds the maximum value and underflow if the value falls short of the minimum value. When an overflow or underflow occurs, the carry flag R9009 turns on.
  • Page 109 1.5 Data Ranges Which can be Handled in the PLC Values when overflow or underflow occurs Numerical value handled by the FP series programmable controller all form a loop joined at the maximum value and the minimum value as shown below. 16−bit binary operation Overflow K 32767...
  • Page 110 Relays, Memory Areas and Constants 1 - 86 Phone: 800.894.0412 - Fax: 888.723.4773 - Web: www.clrwtr.com - Email: info@clrwtr.com...
  • Page 111: Chapter 2 Basic Instructions

    Chapter 2 Basic Instructions Phone: 800.894.0412 - Fax: 888.723.4773 - Web: www.clrwtr.com - Email: info@clrwtr.com...
  • Page 112 Basic Instructions 2 - 2 Phone: 800.894.0412 - Fax: 888.723.4773 - Web: www.clrwtr.com - Email: info@clrwtr.com...
  • Page 113: Composition Of Basic Instructions

    Composition of Basic Instructions Composition of Basic Instructions 2.1.1 Sequence Basic Instructions These basic instructions perform bit unit logic operations and are the basis of the relay sequence circuit. As shown in the illustration below, this is expressed by the combination of the relay coil and contact.
  • Page 114: Basic Function Instructions

    Basic Instructions 2.1.2 Basic Function Instructions These are the timer, counter and shift register instructions. To specify set values, the instructions are composed of several steps. Example: Example of setting 3.0 seconds in the 0.1 second timer (timer 5) Timer 5 (0.1 s units timer) Set value TMX 5 K 30...
  • Page 115: Data Compare Instructions

    Composition of Basic Instructions Interrupt program In addition to the normal program, enter an interrupt program (specified with INT or IRET) if you need a program which will execute immediately when a certain condition is met. When an interrupt is received, the normal program is interrupted and the interrupt program is executed.
  • Page 116: Number Of Steps In The Fp2, Fp2Sh And Fp10Sh

    Basic Instructions Number of Steps in the FP2, FP2SH and FP10SH Number of steps in basic instructions Of the basic instructions used with the FP2, FP2SH and FP10SH, the number of steps in the following instructions changes depending on the number specified. Sequence basic instructions With Start (ST), Out (OT), And (AN), Or (OR), and Keep (KP), the number of steps making up the instruction changes depending on the relay number which has been...
  • Page 117 Number of Steps in the FP2, FP2SH and FP10SH Control and subroutine instructions Steps Instructions Instructions Normal specification With index modification LOOP CALL FCAL Note Index modification is possible only with the FP2, FP2SH and FP10SH.Table of Basic Instructions 2 - 7 Phone: 800.894.0412 - Fax: 888.723.4773 - Web: www.clrwtr.com - Email: info@clrwtr.com...
  • Page 118 Basic Instructions Start Start Not Outline ST, ST/: Begins a logic operation. Outputs the operation result. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Start Start Not Operands Timer/Counter Relay Index Contact modifier modifier Instruction Instruction (*4) (*1) (*2) (*3) ST, ST/ Available...
  • Page 119 Basic Instructions Precautions during programming The ST and ST/ instructions start from the bus line. The OT instruction cannot start directly from the bus line. The OT instruction can be used consecutively. Some input devices, such as emergency stop switches, usually have a Form B (normally closed) contact. When an emergency stop switch with a Form B contact is programmed, be sure to use the ST instruction.
  • Page 120 Basic Instructions Outline Inverts the operation result up to this instruction. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Explanation of example Y10 goes on and Y11 goes off when X0 turns on. Y10 goes off and Y11 goes on when X0 turns off. Description The / instruction inverts the operation result up to this instruction.
  • Page 121 Basic Instructions AND Not Outline AN: Connects Form A (normally open) contacts in series. AN/: Connects Form B (normally closed) contacts in series. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction AND Not Operands Timer/Counter Relay Index Contact modifier modifier Instruction Instruction...
  • Page 122 Basic Instructions OR Not Outline OR: Connects Form A (normally open) contacts in parallel. OR/: Connects Form B (normally closed) contacts in parallel. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction OR Not Operands Timer/Counter Relay Index Contact modifier modifier Instruction Instruction...
  • Page 123 Basic Instructions Precautions during programming Use the OR instruction when normally open contacts (Form A contacts) are connected in parallel. Use the OR/ instruction when normally closed contacts (Form B contacts) are connected in parallel. The OR instruction starts from the bus line. The OR and OR/ instructions can be used consecutively.
  • Page 124 Basic Instructions ↑ Leading edge Start ↓ Trailing edge Start ↑ Leading edge AND ↓ Trailing edge AND Availability ↑ Leading edge OR FP2/FP2SH/FP10SH FP−X (V2.00 or more) FPΣ (V3.10 or more) ↓ Trailing edge OR FP0R Outline Contact instructions for leading edge detection and trailing edge detection Logic processing is only carried out during the scan following detection of a leading edge or trailing edge in the signal.
  • Page 125 Basic Instructions Explanation of example ST↑, AN↑ and OR↑ instructions Output to Y10 takes place for one scan only following a change in X0 from off to on. One scan One scan Leading edge Leading edge Output to Y11 takes place for one scan only following a change in X2 from off to on when X1 is on. One scan Output to Y12 takes place for one scan only following a change in X3 or X4 from on to off.
  • Page 126 Basic Instructions ↑ Leading edge Out ↓ Trailing edge Out Outline Leading edge detection and trailing edge detection output The result of processing is output to the pulse relay for one scan only. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction OT↑...
  • Page 127 Basic Instructions Description OT↑ instructions Output to the pulse relay takes place for one scan only following a change in the immediately previous processing result from off to on. The pulse relay goes on for one scan only. OT↓ instructions Output to the pulse relay takes place for one scan only following a change in the immediately previous processing result from on to off.
  • Page 128 Basic Instructions Alternative out Outline Inverts the output condition each time the leading edge of the signal is detected. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Alternative out Operands Timer/Counter Relay Index Contact Instruction Instruction modifier modifier Available N/A N/A N/A: Not Available Explanation of example...
  • Page 129 Basic Instructions AND stack Outline Multiple blocks are connected in series. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Block 2 Block 1 Explanation of example Y10 goes on when X0 or X1 and X2 or X3 turn on. (X0 OR X1) AND (X2 OR X3) →...
  • Page 130 Basic Instructions When blocks are consecutive When blocks are consecutive, a division of the blocks should be considered, such as that shown below. block block block block block block ... block block block...
  • Page 131 Basic Instructions OR stack Outline Multiple blocks are connected in parallel. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Block 1 Block 2 Explanation of example Y10 goes on when both X0 and X1 or both X2 and X3 turn on. (X0 AND X1) OR (X2 AND X3) →...
  • Page 132 Basic Instructions When blocks are consecutive When blocks are consecutive, a division of the blocks should be considered, such as that shown below. block block 4 block block block block block ..block block .
  • Page 133 Basic Instructions PSHS Push stack Read stack POPS Pop stack Outline PSHS: Stores the operation result up to this instruction. RDS: Reads the operation result stored by the PSHS instruction. POPS: Reads and clears the operation result stored by the PSHS instruction.
  • Page 134 Basic Instructions Description One operation result can be stored in memory and read, and multiple processes performed. PSHS (stores operation result): Stores the operation result up to this instruction and continues execution from the next step. RDS (reads operation result): Reads the operation result stored using the PSHS instruction and, using this result, continues operation from the next step.
  • Page 135 Basic Instructions Caution regarding repeated use of a PSHS instruction The PSHS instruction is limited in the number of times that it can be used consecutively. The number of times that the instruction can be used consecutively before the next POPS instruction is as shown below. Type No.
  • Page 136 Basic Instructions Leading edge differential Trailing edge differential Outline DF: Turns on the contact for only one scan when the leading edge of the trigger is detected. DF/: Turns on the contact for only one scan when the trailing edge of the trigger is detected.
  • Page 137 Basic Instructions Description The DF instruction executes and turns on output for only one scan duration when the trigger changes from an off to an on state. The DF/ instruction executes and turns on output for only one scan duration when the trigger changes from an on to an off state.
  • Page 138 Basic Instructions Caution is required when using a differential instruction with instructions which change the order of instruction execution such as MC and MCE or JP and LBL (below instructions). − MC to MCE instructions − JP to LBL instructions −...
  • Page 139 Basic Instructions Application example for alternating circuit A differential instruction can also be applied to an alternating circuit to hold and release the circuit using a single signal. Example 1: Example 2: 2 − 29 Phone: 800.894.0412 - Fax: 888.723.4773 - Web: www.clrwtr.com - Email: info@clrwtr.com...
  • Page 140 Basic Instructions Leading edge differential (initial execution type) Outline When a leading edge of signal is detected, the contact goes on during that scan only. Leading edge detection is possible at the first scan. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Leading edge differential...
  • Page 141 Basic Instructions Precautions during programming When used with instructions which change the order of execution such as MC to MCE and JP to LBL (see below), caution must be exercised. − MC to MCE instructions − JP to LBL instructions −...
  • Page 142 Basic Instructions Reset Outline SET: When the execution conditions have been satisfied, the output is turned on, and the on status is retained. RST: When the execution conditions have been satisfied, the output is turned off, and the off status is retained. Program example Boolean Ladder Diagram...
  • Page 143 Basic Instructions When SET and RST instructions are used When the SET and RST instructions are used, the output changes with each step during processing of the operation. Example: When X0, X1, and X2 are turned on 〈 This portion of the program is processed as if Y10 were on.
  • Page 144 Basic Instructions Keep Outline This is output which is accompanied by set or reset input, and which is retained. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Set input KP R 30 Reset input Output destination Operands Timer/Counter Relay Index Contact modifier...
  • Page 145 Basic Instructions No operation Outline No operation Program example Boolean Ladder Diagram Ladder Diagram Address Instruction ・ Description This instruction has no effect on the operation result to that point. The same operation takes place without a NOP instruction. The NOP instruction can be used to make the program easier to read when checking or correcting. When you want to delete an instruction without changing addresses, write a NOP instruction (overwrite the previous instruction).
  • Page 146 Basic Instructions Timer (0.001s units) Outline Sets the on-delay timer for 0.001s units Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Timer instruction number Timer unit Set value 5, K 300 Timer contact of timer No. 5 Operands Timer/ Index Relay Register...
  • Page 147 Basic Instructions Setting the time in the timer The time setting is equal to the time increment multiplied by the value set in the timer. The value set in the timer can be a decimal value within the range K1 to K32767. The time increment is 0.001 seconds, producing a time range of 0.001 to 32.767 seconds.
  • Page 148 Basic Instructions When the value in the elapsed value area EV reaches zero, the timer contact T with the same number goes on. TML5, K300 Decrement operation ends Important points when specifying constant (K) The constant (K) can be changed during RUN. A specified constant (K) cannot be modified by index modification.
  • Page 149 Basic Instructions With each scan, the value in the elapsed value area EV decrements if the trigger (execution condition) is on. Transfer to EV area F0 MV, K30, SV5 TML5, DT0 Decrement When the value in the elapsed value area EV reaches zero, the timer contact T with the same number goes on.
  • Page 150 Basic Instructions Example: Modifying a timer number TML I05, DT 0 When I0 = K10, the timer operates as TML15. − Setting value area: DT0 − Elapsed value area: EV15 − Timer contact: T15 The timer contact can also be modified by index modification.
  • Page 151 Basic Instructions Changing set values based on specified conditions The set value is K50 when X0 is on and K30 when X1 is on. Ladder diagram Boolean Time chart X1 X0 F0 MV, K 500, DT 0 (MV) X0 X1 F0 MV, K 300, DT 0 TML 5, DT 0 0.5s...
  • Page 152 Basic Instructions Timer (0.01s units) Timer (0.1s units) Timer (1.0s units) Outline TMR:Sets the on-delay timer for 0.01 s units TMX: Sets the on-delay timer for 0.1 s units TMY: Sets the on-delay timer for 1.0 s units Program example Boolean Ladder Diagram Ladder Diagram...
  • Page 153 Basic Instructions Timer set time The formula of the timer set time is [the time unit] × [set value] The timer setting [n] must be a decimal constant from K1 to K32767. − TMR is from 0.01 to 327.67 seconds in increments of 0.01 seconds. −...
  • Page 154 Basic Instructions When the value in the elapsed value area (EV) reaches zero, the timer contact (T) with same number turns on. TMX 5, K 30 Decrement operation ends Examples of timer instruction applications Serial connection of timer Ladder diagram Boolean Time chart TMX 0, K 30...
  • Page 155 Basic Instructions Directly specifying a set value area number as a timer setting value With FP0/FP−e/FPΣ/FP−X/FP2/FP2SH/FP10SH with a CPU Ver. 4.4 or later with a CPU Ver. 2.7 or later, the set value area number can be specified directly as the set value n. .
  • Page 156 Basic Instructions Timer operation when a set value area number is directly specified When the trigger for a high−level instruction is on, the value is set in the set value area (SV). The following diagram shows an example of using the high−level instruction F0(MV). Set value F0 MV, K30, SV5 TMX 5, SV 5...
  • Page 157 Basic Instructions Examples of applying direct specification of set value area numbers Changing set values based on specified conditions The set value is K50 when X0 is on and K30 when X1 is on. Ladder diagram Boolean Time chart X1 X0 F0 MV, K 50, SV 5 (MV) X0 X1...
  • Page 158 Basic Instructions Counter Outline Decrements a preset counter. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Count number Count input Reset input Elapsed value Set value C 100 Counter contact for counter no. 100 (example showing a case where 100 and subsequent numbers are specified for counters) Operands...
  • Page 159 Basic Instructions Description The counter is a decremental preset counter. At the fall time when the reset input goes from on to off, the value of the set value area (SV) is preset in the elapsed value area (EV). When the reset input is on, the elapsed value is reset to 0. When the count input changes from off to on, the set value begins to decrement, and when the elapsed value reaches 0, the counter contact Cn (n is the counter number) turns on.
  • Page 160 Basic Instructions When the value in the elapsed value area (EV) reaches zero, the counter contact (C) with the same number turns on. CT 100 SV100 EV100 Decrement operation ends C100 Precaution during programming When combining a counter instruction with an AND stack instruction or pop stack instruction, take care that the syntax is correct.
  • Page 161 Basic Instructions Directly specifying a set value area number as a counter set value With FP0/FP−e/FPΣ/FP−X/FP2/FP2SH/FP10SH with a CPU of Ver. 4.4 or later, the set value area number can be specified directly as the set value n... F0 MV, K30, SV100 .
  • Page 162 Basic Instructions Counter operation when a set value area number is directly specified When the trigger for a high−level instruction is on, the value is set in the set value area (SV). The following diagram shows an example of using the high−level instruction F0 (MV). F0 MV, K30, SV100 SV100 Transfers to SV area...
  • Page 163 Basic Instructions Examples of applying direct specification of set value area numbers Changing set values based on specified conditions The set value is K50 when X0 is on and K30 when X1 is on. Ladder diagram Boolean Time chart Example when X0 turns on X1 X0 F0 MV, K 50, SV 100 (MV)
  • Page 164 Basic Instructions Shift register Outline One bit shift of 16-bit [word internal relay (WR)] data to the left. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction SR WR 3 Data input Shift input Reset input Operands Index Index Relay Timer/Counter Register Constant...
  • Page 165 Basic Instructions Description Shifts the specified data area (WR) one bit to the left. When the shift input turns on (rises), the contents of WR are shifted one bit to the left. During the shift, 1 is set in the empty bit (least significant bit) if the data input is on, or 0 if the data input is off. When shift input is turned on: .
  • Page 166 Basic Instructions Cautions on shift input detection With SR instructions, shift operation takes place when the off−on rise of the shift input is detected. If the shift input remains continuously on, a shift will only take place at the rise. No further shifts will take place. In cases where the shift input is initially on such as when the mode is changed to RUN or when the power is turned on with the mode set to RUN, a shift operation will not take place at the first scan.
  • Page 167 Basic Instructions Master control relay Master control relay end Outline Executes the program between the MC and MCE when the execution condition turns on. When the execution condition is off, output between the MC and MCE is turned off. Program example Boolean Ladder Diagram Ladder Diagram...
  • Page 168 Basic Instructions Description Executes program between the MC and MCE instructions when the execution condition turns on. When the execution condition is in the off state, the instructions operate as follows. Instruction Condition of input and output All off Holds the state. Holds the state.
  • Page 169 Basic Instructions Operation of differential instructions between MC and MCE If a differential instruction is used between MC and MCE, the output will vary as follows depending on the timing of the MC execution condition and the input of differential instruction. MC 0 MCE 0 Time chart 1...
  • Page 170 Basic Instructions Precautions during programming A second MC−MCE instruction pair can be entered (nested) between an initial MC−MCE instruction pair. (There is no limit to the number of nestings.) MC 0 MC 1 MC 2 MCE 2 MCE 1 MCE 0 The program cannot be executed if: If either MC or MCE is missing The order of the MC and MCE instructions is reversed.
  • Page 171 Basic Instructions Jump Label Outline Skips to the LBL instruction with the same number as the JP instruction. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Label number (LBL 1 ) Explanation of example When the execution condition X1 turns on, the program skips from JP1 to LBL1. Program X1: on Program...
  • Page 172 Basic Instructions You must be careful when using one of the instructions below, which are executed by detecting the rise of a execution condition such as the differential instruction. − DF (leading edge differential) − Count input with CT (counter) −...
  • Page 173 Basic Instructions Differential instruction operation between JP and LBL instructions If a differential instruction is used in the area between a JP and LBL instruction, be aware that the output will differ as shown below depending on the execution condition of the JP and the input timing of differential instruction.
  • Page 174 Basic Instructions LOOP Loop Label Outline Skips to the LBL instruction that has the same number as the LOOP instruction and executes what follows, repeatedly, until the data of a specified operand becomes “0”. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction (MV)
  • Page 175 Basic Instructions Description When the execution condition (trigger) turns on, 1 is subtracted from the contents of S and if the result is other than 0, the program jumps to the label (LBL instruction) that has the same number as the specified number. The program then continues with the instructions starting from the address of the label that is the loop destination.
  • Page 176 Basic Instructions TM, CT, and SR instruction operation between the LOOP and LBL instructions When the LBL instruction is located after the LOOP instruction: − TM instruction: The TM instruction is not executed. LOOP 1, DT 0 If it is not executed once during a single scan, the correct time cannot be guaranteed.
  • Page 177 Basic Instructions Precautions during programming When the label is written in an address before the LOOP instruction, be careful of the following points. Be sure to have the instruction that sets the number of loop cycles before the area between the LBL and LOOP instructions.
  • Page 178 Basic Instructions Break Outline Stops execution in TEST/RUN mode. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction (BRK) Description The BRK instruction is effective only in the TEST/RUN mode. In the normal RUN condition, this instruction is not executed. In the TEST/RUN mode, program execution is temporarily stopped with the address containing this BRK instruction.
  • Page 179 Basic Instructions 4. When X0 is in the on state, the BRK instruction is executed and program execution stops. 5. Press the “F3” key while holding down the “Shift” key in the MONITOR & TEST RUN window of the programming tool software to continue the program execution. If a BRK instruction is executed, program execution stops.
  • Page 180 Basic Instructions Outline Indicates the end of the ordinary program. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction ( ED ) Description Indicates the end of the ordinary program. Program area Address Ordinary program ( ED ) Subroutine program Interrupt program Program areas are divided into an ordinary program area (main program) and “subroutine”...
  • Page 181 Basic Instructions CNDE Conditional end Outline Ends one scan of the program when the execution condition (trigger) turns on. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Execution condition (Trigger) ( CNDE ) CNDE Description The CNDE instruction enables you to end one scan of the program. When the execution condition (trigger) turns on, the program finishes and the input, output, and other such operations are performed.
  • Page 182 Basic Instructions Program execution when the CNDE instruction is executed (when X3 turns on). CNDE This part of the program is not executed when the CNDE instruction is executed. Program execution during normal scanning. 2 − 72 Phone: 800.894.0412 - Fax: 888.723.4773 - Web: www.clrwtr.com - Email: info@clrwtr.com...
  • Page 183 Basic Instructions EJECT Eject Outline Adds page break for use when printing. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction ( EJECT ) EJECT Explanation of example Insert the EJECT instruction in the address where you want the page to break when printing out the program you created.
  • Page 184 Basic Instructions 2 − 74 Phone: 800.894.0412 - Fax: 888.723.4773 - Web: www.clrwtr.com - Email: info@clrwtr.com...
  • Page 185 Basic Instructions SSTP Start step NSTL Next step (scan execution type) NSTP Next step (pulse execution type) CSTP Clear step STPE Step end Outline SSTP: Indicates the start of a step ladder process. NSTL: Opens a step ladder process. NSTL is executed every scan if its trigger is on. NSTP: Opens a step ladder process.
  • Page 186 Basic Instructions Description When the NSTL instruction or the NSTP instruction is executed, the process starting with the SSTP instruction of the specified number is started and executed. In a step ladder program, a process is identified as being from one SSTP instruction to the next SSTP or STPE instruction.
  • Page 187 Basic Instructions Syntax of step ladder instruction SSTP (start step) instruction: This instruction indicates the start of a process n. SSTP 1 Program Process 1 SSTP 2 Program Process 2 SSTP 5 Program In a step ladder program, a process n is identified as being from one SSTPn instruction to the next SSTP or STPE instruction.
  • Page 188 Basic Instructions NSTL (Next step, scan execution type) instruction: NSTP (Next step, differential (pulse) execution type) instruction: When an NSTPn or NSTLn instruction is executed, the process with the same process number “n” as the NSTP or NSTL instruction is opened. The execution condition (trigger) for the next step instruction means the execution condition (trigger) to start the process.
  • Page 189 Basic Instructions CSTP (clear step) instruction: When a CSTP instruction is executed, the process “n” with the same process number “n” is cleared. This instruction can be used to clear the final process or to clear the processes when the parallel branch merge control is executed.
  • Page 190 Basic Instructions When you need to clear an entire processes in step ladder program, use the master control (MC and MCE) instructions as shown below. Example: All processes are cleared when X0 becomes on. SSTP 1 Step SSTP 2 Master control ladder instructions area...
  • Page 191 Basic Instructions The execution state (start/stop) for processes are stored in special data registers: Type Special data register FP0 C10, C14, C16, C32/ DT9060 to DT9067 FP−e FP0 T32/FP0R DT90060 to DT90067 FPΣ/FP−X/FP2/FP2SH/ DT90060 to DT90122 FP10SH Example: The start−up conditions for processes No. 16 through No. 31 12 11 Bit position 28 27...
  • Page 192 Basic Instructions You must be careful when using one of the instructions below, which are executed by detecting the leading edge of execution condition (trigger) such as the differential instruction. − DF (leading edge differential) − Count input of CT (counter) −...
  • Page 193 Basic Instructions Selection branch control of a process This program selects and switches to the next process according to the actions and results of a particular process. Each process loops until its work is completed. Program two or more NSTL instructions to trigger the next process in a process. Depending on the execution conditions, the next process is selected, triggered and program execution is transferred.
  • Page 194 Basic Instructions Parallel branch merge control of a process This program triggers multiple processes simultaneously. After each of the branch processes has completed its work, they merge again before transferring execution to the next process. Program multiple NSTL instructions for one trigger in a process. To merge processes, include a flag indicating the state of the other processes in the transfer condition for the next process.
  • Page 195 Basic Instructions SCLR Clear multiple processes Outline Reset multiple processes specified by n1 and n2. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction NSTL NSTL SSTP SSTP NSTL NSTL NSTL NSTL NSTL NSTL SSTP SSTP SCLR SCLR K1, K3 STPE STPE Explanation of example...
  • Page 196 Basic Instructions CALL Subroutine call Subroutine entry Subroutine return Outline CALL: Executes the specified subroutine program. SUB: Indicates the start of the subroutine program. RET: Indicates the end of the subroutine program. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction (CALL CALL...
  • Page 197 Basic Instructions Nesting of subroutines is possible until the 5th nesting. SUB 0 (Stage 2) CALL1 SUB 1 (Stage 3) CALL2 SUB 2 (Stage 4) CALL3 SUB 3 (Stage 5) CALL4 SUB 4 Called up from inside of the subroutine. 5th nesting example Flag conditions ・Error flag (R9007):...
  • Page 198 Basic Instructions For the FP2/FP2SH/FP10SH, subroutine programs may be constructed with multiple entrances and only one exit. SUB 11 CALL11 SUB 12 SUB 13 CALL13 SUB 14 When “CALL 11” is executed, are executed. When “CALL 13” is executed, are executed. You must be careful when you use, in a subroutine, one of the instructions below that is executed by detecting the leading of execution condition (trigger) such as the differential instruction.
  • Page 199 Basic Instructions FCAL Output off type subroutine call Outline Executes the specified subroutine. When returning to the main program, all outputs in the subroutine program are set to off. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction FCAL FCAL Subroutine program number Description Operation and syntax are the same as normal subroutine call instructions.
  • Page 200 Basic Instructions Precautions during programming Like a CALL instruction, up to five nesting levels are possible. However, it will not be possible to use certain MC numbers depending on the number of nesting levels as shown below. Calls from other than subroutines MC255 MC255 to 254 MC255 to 253...
  • Page 201 Basic Instructions FP0/FP0R/FP−e/FPΣ/FP−X Availability Interrupt FP0/FP0R/FP−e/ IRET FPΣ/FP−X Interrupt return Outline INT: Indicates the start of the interrupt program. IRET: Indicates the end of the interrupt program. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction (INT Interrupt program number (IRET IRET Description...
  • Page 202 Basic Instructions FP0/FP0R/FP−e/FPΣ/FP−X Syntax of interrupt program An interrupt program n is the program between the INTn instruction and the IRET instruction. The interrupt program must always be placed after the ED instruction. The number of the interrupt program is decided by the type of the interrupt. Interrupt Interrupt input Program No.
  • Page 203 Basic Instructions FP0/FP0R/FP−e/FPΣ/FP−X Before inputting an interrupt program Declare the contact point to be used as the interrupt input (trigger). Select the contact point to be used as the interrupt input (trigger) and indicate it at system register 403. Notes If the high−speed counter/pulse catch is set, that contact cannot be used as the interrupt input (trigger).
  • Page 204 Basic Instructions FP0/FP0R/FP−e/FPΣ/FP−X When another interrupt program is being executed, an interrupt will occur after the current program is completed. Execution Main program Execution INT1 program Execution INT2 program INT2 input Precautions during programming for all types If either the INT instruction or IRET instruction is missing, a syntax error will result. When an interrupt is issued, the operation memory corresponding to the interrupt input contact does not undergo I/O refreshing.
  • Page 205 Basic Instructions FP0/FP0R/FP−e/FPΣ/FP−X Control when more than one interrupt occurs simultaneously. When more than one interrupt occurs simultaneously, the interrupt program with the smaller number is executed first. The other interrupt programs are then placed in the execution waiting state. After the first interrupt program is completed, the other programs will be executed in order from the smallest number to the greatest.
  • Page 206 Basic Instructions FP0/FP0R/FP−e/FPΣ/FP−X Interrupt program execution waiting state and clearing When multiple interrupt programs occur simultaneously or new interrupt programs occur during the execution of another interrupt program, the interrupt programs of lower preference are placed in the execution waiting state. They are then executed in order of preference when the other interrupt programs are completed.
  • Page 207 Basic Instructions FP2/FP2SH/FP10SH Availability Interrupt FP2/FP2SH/FP10SH IRET Interrupt return Outline INT: Indicates the start of the interrupt program. IRET: Indicates the end of the interrupt program. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction (INT Interrupt program number (IRET IRET Description When an interrupt is input, the interrupt program of the number specified is executed starting from the INT...
  • Page 208 Basic Instructions FP2/FP2SH/FP10SH Interrupt program execution There are three types of interrupt. Interrupts from a interrupt unit (corresponding to INT0 to INT15) Interrupts are issued in response to the rise or fall of the interrupt unit input (whether rising or falling is specified on the unit side).
  • Page 209 Basic Instructions FP2/FP2SH/FP10SH Precautions during programming for all types If either the INT instruction or IRET instruction is missing, a syntax error will result. When an interrupt is issued, the operation memory corresponding to the interrupt input contact does not undergo I/O refreshing.
  • Page 210 Basic Instructions FP2/FP2SH/FP10SH Control when more than one interrupt occurs simultaneously. When more than one interrupt occurs simultaneously, the interrupt program with the smaller number is executed first. The other interrupt programs are then placed in the execution waiting state. After the first interrupt program is completed, the other programs will be executed in order from the smallest number to the greatest.
  • Page 211 Basic Instructions FP2/FP2SH/FP10SH Interrupt program execution waiting state and clearing When multiple interrupt programs occur simultaneously or new interrupt programs occur during the execution of another interrupt program, the interrupt programs of lower preference are placed in the execution waiting state. They are then executed in order of preference when the other interrupt programs are completed.
  • Page 212 Basic Instructions FP0/FP0R/FP−e/FPΣ/FP−X Availability ICTL FP0/FP−e/FPΣ/FP−X/ Interrupt control FP0R Outline Performs the interrupt enable or disable and the interrupt clear. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction ( DF ) ICTL, H 0, H 1 ICTL 16-bit equivalent constant or 16-bit area for interrupt control data setting 16-bit equivalent constant or 16-bit area for interrupt condition setting Operands Index...
  • Page 213 Basic Instructions FP0/FP0R/FP−e/FPΣ/FP−X Precaution if rewriting during a RUN operation (for FP0/FP0R/FP−e/FPΣ) If rewriting is done during a RUN operation while the interrupt function is being used, execution of the interrupt function is inhibited. The ICTL instruction has to be used once again to enable the interrupt program to be executed.
  • Page 214 Basic Instructions FP0/FP0R/FP−e/FPΣ/FP−X Specifying control data S1: Specifying the control functions and interrupt types Bit position 12 11 Interrupt type selection H00: INT 0 to INT 7 H02: INT 24 (10ms units) H03: INT 24 (0.5ms units) Selection of control function H00: Interrupt “enabled/disabled”...
  • Page 215 Basic Instructions FP0/FP0R/FP−e/FPΣ/FP−X S2: Specifying the control of interrupts Enabling or disabling interrupt programs (when S1 = H0 or S1 = H1). Set the control data in the bit corresponding to the number of the interrupt program that you want to control. Set the bit corresponding to the number of the program you want to enable to “1.”...
  • Page 216 Basic Instructions FP0/FP0R/FP−e/FPΣ/FP−X Example of enabling the execution of interrupt programs Example: ICTL, H0, H21 S1: H0000 Specifies enabling or disabling of interrupt programs that correspond to interrupts at specified input contact or to target value match interrupts. S2: H0021 Enable INT0 and INT5 (set bits 0 and 5 to “1”) and disable all others.
  • Page 217 Basic Instructions FP0/FP0R/FP−e/FPΣ/FP−X ICTL instruction Execution Main program Execution Execution INT0 program INT5 program Execution INT0 input INT5 input Condition Disabled Enabled How to start the interrupt program when executing the high−speed counter match ON/match OFF instruction. Set the counter by the system register. (It is not necessary to set the external interrupt.) Describe the interrupt program on the program.
  • Page 218 Basic Instructions FP0/FP0R/FP−e/FPΣ/FP−X S2: HFE Clears interrupt INT0 (bit 0 is “0”) and does not clear the other interrupts. For the relationship between the set value and the interrupt input contact, refer to page 2 − 106. Even though the INT0 interrupt input occurred, when the interrupt program is disabled, the ICTL instruction can still be used to clear the INT0 interrupt.
  • Page 219 Basic Instructions FP0/FP0R/FP−e/FPΣ/FP−X To stop the periodical interrupt program, execute the following program. ICTL, H2, K0 2 − 109 Phone: 800.894.0412 - Fax: 888.723.4773 - Web: www.clrwtr.com - Email: info@clrwtr.com...
  • Page 220 Basic Instructions FP2/FP2SH/FP10SH Availability ICTL Interrupt control FP2/FP2SH/FP10SH Outline Performs the interrupt enable or disable and the interrupt clear. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction ( DF ) ICTL, H 0, H 1 ICTL 16-bit equivalent constant or 16-bit area for interrupt control data setting 16-bit equivalent constant or 16-bit area for interrupt condition setting Operands Index...
  • Page 221 Basic Instructions FP2/FP2SH/FP10SH Input examples Example 1: Setting a periodical interrupt every 10ms from the start of operations R9013 Executes INT24 every 10ms ICTL, H2, K1 The R9013 (initial pulse relay) turns on only for the first scan after operations begin. Example 2: Enable INT0 through INT3 when X30 rises.
  • Page 222 Basic Instructions FP2/FP2SH/FP10SH If execution has been specified as enabled or disabled for INT0 to INT15, [S1] = H0. If an interrupt clear has been specified for INT0 to INT15, [S1] = H100. If execution has been specified as enabled or disabled for INT16 to INT23, [S1] = H1. If an interrupt clear has been specified for INT16 to INT23, [S1] = H101.
  • Page 223 Basic Instructions FP2/FP2SH/FP10SH Specifying periodical interrupt programs (when S1 = H3 or S1=H5) for FP0/FP2/FP2SH/FP10SH only Specify the setting with decimal number. The time interval = value of S2 × 0.5 (ms). Bit position 12 11 K0 to K3000 Time interval setting: K1 to K3000 (0.5ms to 1.5s) INT24 disabled: K0 Note For the difference in the operation of H3 and H5, refer to...
  • Page 224 Basic Instructions FP2/FP2SH/FP10SH Example of enabling the execution of interrupt programs Example: ICTL, H0, H101 [S1]: H0000 This specifies whether execution of the interrupt program corresponding to the interrupt from the interrupt unit (INT0 to INT15) is enabled or disabled. [S2]: H0101 Enable INT0 and INT8 (set bits 0 and 8 to “1”) and disable all others.
  • Page 225 Basic Instructions FP2/FP2SH/FP10SH When this ICTL instruction is executed, interrupt programs INT0 and INT8 will be executed when their corresponding interrupt inputs occur. ICTL instruction Execution Main program Execution Execution INT0 program INT8 program Execution INT0 input INT8 input Condition Disabled Enabled 2 −...
  • Page 226 Basic Instructions FP2/FP2SH/FP10SH Example for clearing interrupt programs Example: ICTL, H100, HFFFE [S1]: H0100 Clears interrupts from the interrupt unit (INT 0 to INT15). [S2]: HFFFE Clears interrupt INT0 (bit 0 is “0”) and does not clear the other interrupts. For the relationship between the set value and the interrupt unit, refer to page 2 −...
  • Page 227 Basic Instructions FP2/FP2SH/FP10SH Example 1 for setting periodical interrupt Example: ICTL, H2, K1500 [S1]: H0002 Specifies periodical interrupt (units: 10ms) [S2]: K1500 Specifies the time interval for the periodical interrupt. With K1500, the time interval is K1500 x 10ms = 15000ms (15s) After this ICTL instruction is executed, the periodical interrupt will occur every 15 seconds.
  • Page 228 Basic Instructions FP2/FP2SH/FP10SH Example 2 for setting periodical interrupt When H4 or H5 is designated, the periodical interrupt occurs at the specified interval regardless of interrupt processing time. Compatible−timer: (kind= H02,H03) [S2] [S2] After the periodical interrupt program completed, the next interrupt timing is counted.
  • Page 229 Basic Instructions FPΣ/FP−X/FP0R Availability SYS1 Communication conditions setting FPΣ/FP−X/FP0R Outline This changes the communication conditions for the COM port or Tool port based on the contents specified by the character constant. Program example Boolean Non-ladder Ladder Diagram Ladder Diagram Address Instruction Trigger SYS1...
  • Page 230 Basic Instructions FPΣ/FP−X/FP0R Keyword setting 1) Communication format (Shared by the Tool, COM. 1 and COM. 2 ports) SYS1, M TOOL,B7 PN S1 Port used TOOL: Tool port COM1: COM. 1 port COM2: COM. 2 port Character bit B7: 7bits B8: 8bits Parity PN: None...
  • Page 231 Basic Instructions FPΣ/FP−X/FP0R 4) Header and Terminator (Shared by the TOOL, the COM. 1 and COM. 2 ports) SYS1, M COM1,STX Port used TOOL: Tool port (FPΣ 32k/FP−X/FP0R) COM1: COM. 1 port COM2: COM. 2 port Header STX: STX NOSTX: STX not exist Terminator ETX: ETX CR: CR...
  • Page 232 Basic Instructions FPΣ/FP−X/FP0R Flag conditions ・Error flag (R9007): Turns on and stays on when: ・Error flag (R9008): Turns on for an instant when: − Any character other than a keyword is specified − There is no comma between No. 1 and No. 2 keywords −...
  • Page 233 Basic Instructions FPΣ/FP−X/FP0R Availability SYS1 Password setting FPΣ/FP−X/FP0R Outline This changes the password specified by the controller, based on the contents specified by the character constant. Program example Boolean Non-ladder Ladder Diagram Ladder Diagram Address Instruction Trigger SYS1 SYS1, PASS,ABCD PASS,ABCD No.
  • Page 234 Basic Instructions FPΣ/FP−X/FP0R Keyword setting For the 4−digit password SYS1, M PASS,ABCD PASS : Fixed Password (Example: To set the password to “ABCD”) For the 8−digit password (It is available for FPΣ 32k/FP−X/FP0R.) SYS1, M PAS, abcdefgh : Fixed Password (Example: When “abcdefgh”...
  • Page 235 Basic Instructions FPΣ/FP−X/FP0R Availability SYS1 Interrupt setting FPΣ/FP−X/FP0R Outline This sets the interrupt input based on the contents specified by the character constant. Program example Boolean Non-ladder Ladder Diagram Ladder Diagram Address Instruction Trigger SYS1 SYS1, M INT1,UP INT1,UP No. 1 No.
  • Page 236 Basic Instructions FPΣ/FP−X/FP0R Precautions during programming Executing this instruction does not rewrite the contents of the system ROM in the control unit. As a result, turning the power supply off and then on again rewrites the contents of the system registers specified by the tool software.
  • Page 237 Basic Instructions FPΣ/FP−X/FP0R Availability SYS1 PLC link time setting FPΣ/FP−X/FP0R Outline This sets the system setting time when a PLC link is used, based on the contents specified by the character constant. Program example Boolean Non-ladder Ladder Diagram Ladder Diagram Address Instruction 90141...
  • Page 238 Basic Instructions FPΣ/FP−X/FP0R 2) Error detection time for transmission assurance relay SYS1, M PCLK1T1,100 PCLK1T1: Fixed Specified range: 100 to 6400 (100ms to 6400ms) Precautions during programming The program should be placed at the beginning of all PLCs being linked, and the same values specified. This instruction should be specified in order to set special internal relay R9014 as the differential execution condition.
  • Page 239 Basic Instructions FPΣ/FP−X/FP0R Availability FPΣ 32k SYS1 Change high−speed counter FP−X Ver 1.10 or more operation mode FP0R Outline This changes the operation mode of the high−speed counter based on the contents specified by the character constant. Program example Boolean Non-ladder Ladder Diagram Ladder Diagram Address...
  • Page 240 Basic Instructions FPΣ/FP−X/FP0R Precautions during programming If the system register is not set to the addition input or subtraction input for this instruction, an operation error occurs. Set the system register to the addition or subtraction input in advance. When the addition/subtraction input setting is specified even if the setting has been already done, an operation error does not occur.
  • Page 241 Basic Instructions FPΣ/FP−X/FP0R Availability SYS1 MEWTOCOL−COM response control FPΣ/FP−X/FP0R Outline This specifies the response waiting time based on the MEWTOCOL−COM of the COM port or Tool port, in response to the contents specified by the character constant. Program example Boolean Non-ladder Ladder Diagram Ladder Diagram Address...
  • Page 242 Basic Instructions FPΣ/FP−X/FP0R Keyword setting SYS1, M TOOL,WAITn Port used TOOL: Tool port COM1: COM. 1 port COM2: COM. 2 port Response time WAIT0 to WAIT999 (n: 0 to 999) If the communication mode or the MOD BUS RTV mode has been set to the computer link mode, the set time is the scan time x n (n: 0 to 999).
  • Page 243 Basic Instructions FPΣ/FP−X/FP0R Availability Change system registers SYS2 (No. 40 to No. 47, No. 50 to No. 57) FPΣ/FP−X/FP0R Outline This changes the settings entered for the system registers of the PLC link function, in accordance with the specified data. Program example Boolean Ladder Diagram...
  • Page 244 Basic Instructions FPΣ/FP−X/FP0R System registers Name Setting value and range Range of link relays used 0 to 64 words Range of link data registers used 0 to 128 words Starting number for link relay 0 to 63 transmission Link relay transmission size 0 to 64 words Starting number for link data register 0 to 127...
  • Page 245 Basic Instructions FPΣ/FP−X/FP0R Precaution during programming Executing this instruction does not rewrite the contents of the system ROM in the control unit. As a result, turning the power supply off and then on again rewrites the contents of the system registers specified by the tool software.
  • Page 246 Basic Instructions ST = 16−bit data comparison: Start equal ST <> 16−bit data comparison: Start equal not ST > 16−bit data comparison: Start larger ST >= 16−bit data comparison: Start equal or larger ST < 16−bit data comparison: Start smaller ST <= 16−bit data comparison: Start equal or smaller...
  • Page 247 Basic Instructions Explanation of example Compares the contents of data register DT0 with the constant K50 and K60. If DT0 = K50, the external output relay Y30 goes on and if DT0 K60, the external output relay Y31 turns on. Description Compares the word data specified by S1 with the word data specified by S2 according to the comparison condition.
  • Page 248 Basic Instructions STD = 32−bit data comparison: Start equal STD <> 32−bit data comparison: Start equal not STD > 32−bit data comparison: Start larger STD >= 32−bit data comparison: Start equal or larger STD < 32−bit data comparison: Start smaller STD <= 32−bit data comparison: Start equal or smaller...
  • Page 249 Basic Instructions Explanation of example Compares the contents of data registers (DT1, DT0) with the data registers (DT101, DT100). If (DT1, DT0) = (DT101, DT100), the external output relay Y30 goes on and if (DT1, DT0) > (DT101, DT100), the external output relay Y31 goes on. Description Compares the double word data specified by S1 and S1+1 with the double word data specified by S2 and S2+1 according to the comparison condition.
  • Page 250 Basic Instructions STF = Floating point real number data comparison: Start equal STF <> Floating point real number data comparison: Start equal not STF > Floating point real number data comparison: Start larger STF >= Floating point real number data comparison: Start equal or larger Availability STF <...
  • Page 251 Basic Instructions Explanation of example Compares the real number value of data registers (DT0, DT1) with the real number value of data registers (DT100, DT101). If (DT0, DT1) = (DT100, DT101), the external output relay Y30 goes on and if (DT0, DT1) > (DT100, DT101), the external output relay Y31 goes on.
  • Page 252 Basic Instructions AN = 16−bit data comparison: AND equal AN <> 16−bit data comparison: AND equal not AN > 16−bit data comparison: AND larger AN >= 16−bit data comparison: AND equal or larger AN < 16−bit data comparison: AND smaller AN <= 16−bit data comparison: AND equal or smaller...
  • Page 253 Basic Instructions Explanation of example Compares the contents of data register DT0 with the constant K60 when X0 turns on. If DT0 K60 in the X0 on state, external output relay Y30 goes on. If DT0 < K60 or if X0 is in the off state, external output relay Y30 goes off.
  • Page 254 Basic Instructions AND = 32−bit data comparison: AND equal AND <> 32−bit data comparison: AND equal not AND > 32−bit data comparison: AND larger AND >= 32−bit data comparison: AND equal or larger AND < 32−bit data comparison: AND smaller AND <= 32−bit data comparison: AND equal or smaller...
  • Page 255 Basic Instructions Explanation of example Compares the contents of data registers (DT1, DT0) with the data registers (DT101, DT100) when X0 turns on. If (DT1, DT0) (DT101, DT100) in the X0 on state, the external output relay Y30 goes on. If (DT1, DT0) <...
  • Page 256 Basic Instructions ANF = Floating point real number data comparison: AND equal ANF <> Floating point real number data comparison: AND equal not ANF > Floating point real number data comparison: AND larger ANF >= Floating point real number data comparison: AND equal or larger Availability ANF <...
  • Page 257 Basic Instructions Explanation of example Compares the real number value of data registers (DT0, DT1) with the real number value of data registers (DT100, DT101) when X0 turns on. If (DT0, DT1) (DT100, DT101) in the X0 on state, the external output relay Y30 goes on.
  • Page 258 Basic Instructions OR = 16−bit data comparison: OR equal OR <> 16−bit data comparison: OR equal not OR > 16−bit data comparison: OR larger OR >= 16−bit data comparison: OR equal or larger OR < 16−bit data comparison: OR smaller OR <= 16−bit data comparison: OR equal or smaller...
  • Page 259 Basic Instructions Explanation of example Y30 goes on when X0 is in the on state, or when DT0 K60. If DT0 < K60 and if X0 is in the off state, then Y30 goes off. Description Compares the word data specified by S1 with the word data specified by S2 according to the comparison condition.
  • Page 260 Basic Instructions ORD = 32−bit data comparison: OR equal ORD <> 32−bit data comparison: OR equal not ORD > 32−bit data comparison: OR larger ORD >= 32−bit data comparison: OR equal or larger ORD < 32−bit data comparison: OR smaller ORD <= 32−bit data comparison: OR equal or smaller...
  • Page 261 Basic Instructions Eplanation of example Compares the contents of data registers (DT1, DT0) with the data registers (DT101, DT100). When X0 turns on or if (DT1, DT0) (DT101, DT100), the external output relay Y30 goes on. If (DT1, DT0) < (DT101, DT100) and if X0 is in the off state, the external output relay Y30 goes off. Description Compares the double word data specified by S1 and S1+1 with the double word data specified by S2 and S2+1 according to the comparison condition.
  • Page 262 Basic Instructions ORF = Floating point real number data comparison: OR equal ORF <> Floating point real number data comparison: OR equal not ORF > Floating point real number data comparison: OR larger ORF >= Floating point real number data comparison: OR equal or larger Availability ORF <...
  • Page 263 Basic Instructions Eplanation of example When X0 turns on or if (DT0, DT1) (DT100, DT101) by comparing the real number value of data registers (DT0, DT1) with the real number value of data registers (DT100, DT101), the external output relay Y30 goes on.
  • Page 264 Basic Instructions 2 − 154 Phone: 800.894.0412 - Fax: 888.723.4773 - Web: www.clrwtr.com - Email: info@clrwtr.com...
  • Page 265: Chapter 3 High−Level Instructions

    Chapter 3 High−level Instructions Phone: 800.894.0412 - Fax: 888.723.4773 - Web: www.clrwtr.com - Email: info@clrwtr.com...
  • Page 266 High−level Instructions 3 - 2 Phone: 800.894.0412 - Fax: 888.723.4773 - Web: www.clrwtr.com - Email: info@clrwtr.com...
  • Page 267: Composition Of High-Level Instructions

    Composition of High-level Instructions Composition of High-level Instructions 3.1.1 Composition Each high-level instruction is composed of a high-level instruction number, boolean and operands. Example: F0 (MV) instruction The K0 (S) is copied to DT0 (D) Execution condition Operand (Trigger) Address F0 MV , K0 DT 0 Boolean...
  • Page 268: High-Level Instruction Numbers And Program Input

    High−level Instructions 3.1.2 High-level Instruction Numbers and Program Input High-level instruction numbers are assigned to high-level instructions. For example, the number assigned to the MV instruction (16-bit data transfer instruction) is 0 (F0 or P0). A high−level instruction is entered by entering its high-level instruction number. A high−level instruction with the prefix “F”...
  • Page 269: High-Level Instruction And Execution Condition (Trigger)

    Composition of High-level Instructions 3.1.3 High-level Instruction and Execution Condition (Trigger) A high-level instruction is always used in a pair with its execution condition (trigger). When the operation result of the relay sequence circuit specified as the execution condition (trigger) is on, the high-level instruction is executed. Example: When the execution condition (trigger) X0 is on, the F0 (MV) instruction is executed and K0 is transferred to DT0.
  • Page 270: F" And "P" Type High-Level Instructions

    High−level Instructions Example 2: The execution condition (trigger) is programmed once using the PSHS, RDS and POPS instructions. PSHS F0 MV, WR 0 , DT 10 F0 MV, LD 1 , DT 11 P115 PFIFT, DT 10 , DT 11 POPS 3.1.4 “F”...
  • Page 271 Composition of High-level Instructions When you use the “P” type instruction with one of the following instructions that changes the order of the execution of instructions, be aware that the operation of the instructions will differ depending on the timing of their execution and their execution conditions (triggers).
  • Page 272 High−level Instructions (MV) 16-bit data move (PMV) Outline Copies 16-bit data to the specified 16-bit area. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P0 (PMV)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger (MV) F0 MV , DT 10 , DT 20 16-bit equivalent constant or 16-bit area (source)
  • Page 273 High−level Instructions Application example Example 1: Transfer K30 to timer set value area SV0 when R1 turns on. F0 MV, K 30, SV 0 Example 2: Transfer the timer elapsed value EV0 to data register DT0 when R2 turns on. F0 MV, EV 0, DT 0 Flag conditions ・Error flag (R9007):...
  • Page 274 High−level Instructions (DMV) 32-bit data move (PDMV) Outline Copies 32-bit data to the specified 32-bit area. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P1 (PDMV)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger 1 (DMV) F1 DMV , DT 10 , DT20 32-bit equivalent constant or lower 16-bit area of 32-bit data (source) Lower 16-bit area for 32-bit area (destination)
  • Page 275 High−level Instructions Description The 32-bit data or 32-bit equivalent constant specified by S is copied to the 32-bit area specified by D. When processing 32-bit data, the higher 16-bit areas (S+1, D+1) are automatically determined once the lower 16-bit areas (S, D) are specified. Flag conditions ・Error flag (R9007): Turns on and stays on when the area specified using the index modifier...
  • Page 276 High−level Instructions (MV/) 16-bit data invert and move (PMV/) Outline Inverts 16-bit data and transfers it to the specified 16-bit area. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P2 (PMV/)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger...
  • Page 277 High−level Instructions Description The 16-bit data or 16-bit equivalent constant specified by S is inverted and transferred to the 16-bit area specified by D. Bit position · · · · · · · · · Binary data 0 0 0 0 1 0 1 1 0 Hexadecima...
  • Page 278 High−level Instructions (DMV/) 32-bit data invert and move (PDMV/) Outline Inverts 32-bit data and transfers it to the specified 32-bit area. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P3 (PDMV/)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger...
  • Page 279 High−level Instructions Explanation of example The contents of data registers DT12 and DT11 are inverted and transferred to data registers DT21 and DT20 when trigger R0 turns on. DT10 DT20 H 25AC H 1111 DT11 DT21 H FFFD H FFFF DT12 DT22 R0: on...
  • Page 280 High−level Instructions (GETS) Reading of head word No. of the specified slot. (PGETS) Outline The head word No. of the specified slot is read. This function is available from FP2/FP2SH Ver. 1.50 or later. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger...
  • Page 281 High−level Instructions (BTM) Bit data move (PBTM) Outline Copies bit data of one 16-bit area to the specified bit of another 16-bit area. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P5 (PBTM)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction...
  • Page 282 High−level Instructions Explanation of example The data at bit position 4 in data register DT20 is copied to bit position 12 in data register DT10 when trigger R0 turns on. Source [S] n : H C 0 4 Bit position ·...
  • Page 283 High−level Instructions Transferring multiple bits [this can only be executed with FP0R, FPΣ, FP−X, FP2 (Ver. 1.03 and subsequent versions), FP2SH, and FP10SH] With the FP2, FP2SH and FP10SH, if the number of bits to be transferred is specified for n, the specified number of bits is transferred in sequential order, starting from the position specified by S, to destination, starting from the position specified by D.
  • Page 284 High−level Instructions If “0” is specified as the number of bits to be transferred, the specified one bit is transferred. If the specified range extends beyond the area of S, the contents of the part extending beyond the area are transferred as “0”.
  • Page 285 High−level Instructions (DGT) Hexadecimal digit data move (PDGT) Outline Copies hexadecimal digits at one 16-bit area to the specified digit position in another 16-bit area. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P6 (PDGT)” is not available. Program example Boolean Ladder Diagram Ladder Diagram...
  • Page 286 High−level Instructions Description The hexadecimal digits in the 16-bit data or in the 16-bit equivalent constant specified by S are copied to the 16-bit area specified by D, as specified by n. Digits Digits are units of 4 bits used when handling data. With this instruction, 16−bit data is separated into four digits.
  • Page 287 High−level Instructions Examples of hexadecimal digit copy The following patterns of digit transfer are possible based on the specification of n. (1) When hexadecimal digit 1 of the source is copied to hexadecimal digit 1 of the destination: digit Specify n: H 1 0 1 digit (2) When hexadecimal digit 3 of the source is copied to hexadecimal digit 0 of the destination: digit...
  • Page 288 High−level Instructions 3 − 24 Phone: 800.894.0412 - Fax: 888.723.4773 - Web: www.clrwtr.com - Email: info@clrwtr.com...
  • Page 289 High−level Instructions (MV2) Two 16-bit data move (PMV2) Outline Copies two 16-bit data to the specified 32-bit area. For the FP0R/FPΣ/FP−X, the P type high−level instruction “P7 (PMV2)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger (MV2) F7 MV2, DT10, DT20, DT30...
  • Page 290 High−level Instructions Description The two 16-bit data or two 16-bit equivalent constant specified by S1 and S2 is copied to the 32-bit area specified by D when the trigger turns on. Related instruction To copy three 16-bit data, use the F190 (MV3) instruction. Flag conditions ・Error flag (R9007): Turns on and stays on when the area specified using the index modifier...
  • Page 291 High−level Instructions (DMV2) Two 32-bit data move (PDMV2) Outline Copies two 32-bit data to the specified 64-bit area. For the FP0R/FPΣ/FP−X, the P type high−level instruction “P8 (PDMV2)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger (DMV2) F8 DMV2, DT10, DT20, DT30...
  • Page 292 High−level Instructions Description The two 32-bit data or two 32-bit equivalent constant specified by S1 and S2 is copied to the 64-bit area (D+3, D+2, D+1 and D) specified by D when the trigger turns on. Related instruction To copy three 32-bit data, use the F191 (DMV3) instruction. Flag conditions ・Error flag (R9007): Turns on and stays on when the area specified using the index modifier...
  • Page 293 High−level Instructions (BKMV) Block move (PBKMV) Outline Copies block data to the specified area. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instructions are not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F 10 (BKMV) F10 BKMV , DT 0 , DT 3 , DT 10 Starting 16-bit area (source) Ending 16-bit area (source) Starting 16-bit area (destination)
  • Page 294 High−level Instructions Explanation of example The data of data register “DT0 to DT3” is copied to the data registers “DT10 to DT13” when trigger R0 turns on. [S1] DT0 DT10 Source DT11 DT12 [S2] DT3 DT13 R0: on “F10 (BKMV)” execution [S1] DT0 DT10 DT11...
  • Page 295 High−level Instructions (COPY) Block copy (PCOPY) Outline Copies the specified 16-bit data to a block with one or more 16-bit areas. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instructions are not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F 11...
  • Page 296 High−level Instructions Explanation of example The contents of data register DT0 are copied to the block ranging from data register DT10 to DT14 when trigger R0 turns on. [D1] DT10 [S] DT1 DT11 DT12 DT13 [D2] DT14 R0: on “F11 (COPY)” execution [D1] DT10 [S] DT1...
  • Page 297 High−level Instructions FP0/FP−e Availability (ICRD) Data read from EEPROM FP0/FP−e Outline Reads data from the EEPROM area. Program example Boolean Non-ladder Ladder Diagram Ladder Diagram Address Instruction Trigger F 12 (ICRD) F12 ICRD , K 0 , K10 , DT0 Constant for specifying the starting address of EEPROM (for source data) 32−bit equivalent constant or lower 16−bit area of 32−bit data for specifying number of words to be read...
  • Page 298 High−level Instructions FP0/FP−e Description S2 blocks of data stored in the EEPROM starting from S1 are transferred into the data register specified by D. At this time, the transferred data is handled in units of 1 block/64 words. Precautions during programming Values that can be specified by S1, S2 and D Type Memory area...
  • Page 299 High−level Instructions FPΣ/FP−X/FP0R Availability (ICRD) Data read from F–ROM FPΣ/FP−X/FP0R Outline Reads data from the F–ROM area. Program example Boolean Non-ladder Ladder Diagram Ladder Diagram Address Instruction Trigger F 12 (ICRD) F12 ICRD , K 0 , K10 , DT0 Constant for specifying the starting address of F–ROM (for source data) 32−bit equivalent constant or lower 16−bit area of 32−bit data for specifying number of words to be read...
  • Page 300 High−level Instructions FPΣ/FP−X/FP0R Description S2 blocks of data stored in the F–ROM starting from S1 are transferred into the data register specified by D. At this time, the transferred data is handled in units of 1 block (2,048 words). Precautions during programming Values that can be specified by S1, S2 and D Type Memory area...
  • Page 301 High−level Instructions FP2SH/FP10SH FP2SH/FP10SH (ICRD) Data read from IC card Availability (PICRD) FP2SH/FP10SH Outline Reads data from the expansion memory area of the IC card. Program example Boolean Non-ladder Ladder Diagram Ladder Diagram Address Instruction Trigger F 12 (ICRD) F12 ICRD , K 0 , K10 , DT100 Constant for specifying the starting address of IC card expansion memory (for source data)
  • Page 302 High−level Instructions FP2SH/FP10SH Description S2 words of data stored in the IC card expansion memory area starting from S1 are transferred into the CPU memory location specified by D. Precautions during programming The values available for S1 and S2 vary depending on the size of the IC card expansion memory area. When using an nkB IC card n x 1024 −1...
  • Page 303 High−level Instructions FP0/FP−e Step Availability (PICWT) Data write to EEPROM FP0 V2.0 or more/FP−e Outline Writes data to the EEPROM area. Program examplez Boolean Non-ladder Ladder Diagram Ladder Diagram Address Instruction Trigger P 13 (PICWT) P13 PICWT , DT 0 , K10 , This instruction is a differential execution type (P type) of instruction, and should be specified with a “P”...
  • Page 304 High−level Instructions FP0/FP−e Description S2 blocks of data stored in the data register starting from S1 are transferred into the EEPROM area specified by D. At this time, the transferred data is handled in units of 1 block/64 words. Precautions during programming Values that can be specified by S1, S2 and D Type Memory area...
  • Page 305 High−level Instructions FPΣ/FP−X/FP0R Availability (PICWT) Data write to F–ROM FPΣ/FP−X/FP0R Outline Writes data to the F–ROM area. Program example Boolean Non-ladder Ladder Diagram Ladder Diagram Address Instruction Trigger P 13 (PICWT) P13 PICWT , DT 0 , K1 , This instruction is a differential execution type (P type) of instruction, and should be specified with a “P”...
  • Page 306 High−level Instructions FPΣ/FP−X/FP0R Description S2 block of data stored in the data register starting from S1 is transferred into the F–ROM area specified by D. At this time, the transferred data is handled in units of 1 block (2,048 words). Precautions during programming Values that can be specified by S1, S2 and D Type...
  • Page 307 High−level Instructions FP2SH/FP10SH (ICWT) Availability Data write to IC card (PICWT) FP2SH/FP10SH Outline Writes data to the expansion memory area in the IC card. Program example Boolean Non-ladder Ladder Diagram Ladder Diagram Address Instruction Trigger F 13 (ICWT) F13 ICWT , DT 100 , K10 , K100 Starting 16-bit area for storing source data 32−bit equivalent constant or lower 16−bit area of 32−bit data for specifying number of words to be write...
  • Page 308 High−level Instructions FP2SH/FP10SH Description S2 words of data stored in the CPU starting from S1 are transferred into the expansion memory area in the IC card specified by D. The F13 (ICWT)/P13 (PICWT) instruction can be executed only in the expansion memory area of an SRAM−type IC card.
  • Page 309 High−level Instructions (PGRD) Program read from IC card (PPGRD) Outline Reads a program from the IC card and executes it. Program example Boolean Non-ladder Ladder Diagram Ladder Diagram Address Instruction Trigger F 14 (PGRD) F14 PGRD , DT 100 Starting 16-bit area (max. 4 words of data) for storing file name (max. 8 letters) in the ASCII format.
  • Page 310 High−level Instructions Description The program for the file name stored in the area specified by S is read from the IC memory card, and is substituted for the program currently being executed. Subsequent operation is carried out based on the program which was read. Precautions when changing programs Programs are changed when the ED instruction is executed.
  • Page 311 High−level Instructions Specifying file names The program file name should be replaced with a character code, and written to the memory area that has S as the first address. ASCII codes can be used. No extension should be attached. A single−byte numerical value H00 is the final code. If ”H00” is written at the end of the file name (the MSB), the characters up to that point area treated as the file name.
  • Page 312 High−level Instructions Specifying a file name with the ASCII conversion instruction, and converting it The file name is converted to a character code using the ASCII conversion instruction “F95 (ASC)”, and is written to a specified memory area. − Programming can only be done with the programming tool software. −...
  • Page 313 High−level Instructions (XCH) 16-bit data exchange (PXCH) Outline Exchanges two 16-bit data items. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P15 (PXCH)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F 15 (XCH) F15 XCH , DT 10 , DT 22 16-bit area to be exchanged 16-bit area to be exchanged Operands...
  • Page 314 High−level Instructions Explanation of example The contents of data register DT10 and data register DT22 are exchanged when trigger R0 turns on. [D1] DT10 DT20 DT11 DT21 DT12 DT22 [D2] DT13 DT23 DT14 DT24 R0: on “F15 (XCH)” execution [D1] DT10 DT20 DT11 DT21...
  • Page 315 High−level Instructions (DXCH) 32-bit data exchange (PDXCH) Outline Exchanges two 32-bit data items. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instructions are not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F 16 (DXCH) F16 DXCH , DT 10 , DT22 Lower 16-bit area of 32-bit data to be exchanged Lower 16-bit area of 32-bit data to be exchanged Operands...
  • Page 316 High−level Instructions Explanation of example The contents of data registers DT11 and DT10 and data registers DT23 and DT22 are exchanged when trigger R0 turns on. DT20 1234 [D1] DT10 DT21 DT11 FFFD 5678 DT22 [D2] DT12 25AC 9ABC DT23 DEF1 DT13 R0: on...
  • Page 317 High−level Instructions (SWAP) Higher/lower byte in 16-bit data exchange (PSWAP) Outline Exchanges higher and lower order bytes of the specified 16-bit data. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instructions are not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger...
  • Page 318 High−level Instructions Description The higher order byte (higher 8-bit) and lower order byte (lower 8-bit) of the 16-bit area specified by D are exchanged. Flag conditions ・Error flag (R9007): Turns on and stays on when the area specified using the index modifier exceeds the limit.
  • Page 319 High−level Instructions (BXCH) 16-bit blocked data exchange (PBXCH) Outline Exchanges the 16-bit blocked data. For the FP0R/FPΣ/FP−X, the P type high−level instruction “P18 (PBXCH)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger (BXCH) F18 BXCH, DT10, DT13, DT31 (DF) Starting 16-bit area of block data 1 Ending 16-bit area of block data 1...
  • Page 320 High−level Instructions Explanation of example The data block from data register DT10 to data register DT13 and the data block (DT31 to DT34) starting from data register DT31 are exchanged when trigger R0 turns on. [D1] DT10 DT30 [D3] [D2] DT13 R0: on “F18 (BXCH)”...
  • Page 321 High−level Instructions (SJP) Auxiliary jump Label Outline Skips to the LBL instruction with the same number as the data area specified by the F19 (SJP) instruction. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction (SJP) F19 SJP, DT 0 Label number (LBL 20 ) 16-bit area for storing the label number [0 to 255 (256 points)]...
  • Page 322 High−level Instructions Description The F19 (SJP) instruction skips the program between the F19 (SJP) and the LBL with the number specified by S when the trigger turns on. Program execution continues from the next instruction after the jump destination label. Up to 256 jump destinations can be specified (the range of values in which S can be stored is from K0 to K255).
  • Page 323 High−level Instructions 16-bit data addition [D+S → D] (P+) Outline Adds two 16-bit data items. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P20 (P+)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F 20 (+ ) F20 +, DT 1 , DT 10 16-bit equivalent constant or 16-bit area (for addend)
  • Page 324 High−level Instructions Description The 16-bit equivalent constant or 16-bit area specified by S and the 16-bit area specified by D are added together. Augend data Addend data Trigger turns on Result Precautions during programming If the result of an arithmetic operation instruction does not fall within the range of values which can be handled, an overflow or underflow will result.
  • Page 325 High−level Instructions (D+) 32-bit data addition [(D+1, D) + (S+1, S) → (D+1, D)] (PD+) Outline Adds two 32-bit data items. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P21 (PD+)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger...
  • Page 326 High−level Instructions Explanation of example The contents (32 bits) of data registers DT11 and DT10 and the contents (32 bits) of data registers DT1 and DT0 are added together when trigger R0 turns on. Higher 16 bits Lower 16 bits The specified data area and the Contents of Contents of...
  • Page 327 High−level Instructions 16-bit data addition [S1 + S2 → D] (P+) Outline Adds two 16-bit data items and stores the result in the specified area. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P22 (P+)” is not available. Program example Boolean Ladder Diagram Ladder Diagram...
  • Page 328 High−level Instructions Explanation of example The contents of data registers DT10 and DT20 are added when trigger R0 turns on. The added result is stored in data register DT30. when the decimal number 8 is in DT10 and the decimal number 4 is in DT20, as shown below. Augend [S1]: K8 Bit position ·...
  • Page 329 High−level Instructions (D+) 32-bit data addition [(S1+1, S1) + (S2+1, S2) → (D+1, D)] (PD+) Outline Adds two 32-bit data items and stores the result in the specified area. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P23 (PD+)” is not available. Program example Boolean Ladder Diagram...
  • Page 330 High−level Instructions Explanation of example The contents of data registers DT11 and DT10 and the contents of data registers DT21 and DT20 are added when trigger R0 turns on. The added result is stored in data registers DT31 and DT30. Higher 16 bits Lower 16 bits The specified data area and the...
  • Page 331 High−level Instructions (−) 16-bit data subtraction [D − S → D] (P−) Outline Subtracts 16-bit data from the minuend. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P25 (P−)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F 25...
  • Page 332 High−level Instructions Example 2: When the decimal number 3 is in DT20 and the decimal number 5 is in DT10. DT20 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 (Subtraction) − DT10 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 DT20 K−2...
  • Page 333 High−level Instructions (D−) 32-bit data subtraction [(D+1, D) − (S+1, S) → (D+1, D)] (PD−) Outline Subtracts 32-bit data from the minuend. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P26 (PD−)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction...
  • Page 334 High−level Instructions Explanation of example Subtracts the contents (32 bits) of data registers DT11 and DT10 from the contents (32 bits) of data registers DT21 and DT20 when trigger R0 turns on. Higher 16 bits Lower 16 bits The specified data area and the Contents of Contents of following data area are handled...
  • Page 335 High−level Instructions (−) 16-bit data subtraction [S1 − S2 → D] (P−) Outline Subtracts 16-bit data from the minuend and stores the result in the specified area. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P27 (P−)” is not available. Program example Boolean Ladder Diagram...
  • Page 336 High−level Instructions Explanation of example Subtracts the contents of data register DT20 from the contents of data register DT10 when trigger R0 turns on. The subtracted result is stored in data register DT30. Example 1: When the decimal number 16 is in DT10 and the decimal number 4 is in DT20.
  • Page 337 High−level Instructions (D−) 32-bit data subtraction [(S1+1, S1) − (S2+1, S2) → (D+1, D)] (PD−) Outline Subtracts 32-bit data from the minuend and stores the result in the specified area. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P28 (PD−)” is not available. Program example Boolean Ladder Diagram...
  • Page 338 High−level Instructions Explanation of example Subtracts the contents of data registers DT21 and DT20 from the contents of data registers DT11 and DT10 when trigger R0 turns on. The subtracted result is stored in data registers DT31 and DT30. Higher 16 bits Lower 16 bits The specified data area and the Contents of...
  • Page 339 High−level Instructions 16-bit data multiplication [S1 × S2 → (D+1, D)] (P*) Outline Multiplies two 16-bit data items. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instructions are not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F30 *, DT 10 , DT 20, DT 30 16-bit equivalent constant or 16-bit area (for multiplicand) 16-bit equivalent constant or 16-bit area (for multiplier) Lower 16-bit area of 32-bit data (for result)
  • Page 340 High−level Instructions Explanation of example Multiplies the contents of data register DT10 and DT20 when trigger R0 turns on. The result is stored in data registers DT 31 and DT 30. When the decimal number 8 is in DT10 and the decimal number 2 is in DT20. Multiplicand [S1]: K8 Bit position ·...
  • Page 341 High−level Instructions (D*) 32-bit data multiplication [(S1+1, S1) × (S2+1, S2) → (D+3, D+2, D+1, D)] (PD*) Outline Multiplies two 32-bit data items. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instructions are not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger...
  • Page 342 High−level Instructions Description Multiplies the 32-bit data or 32-bit equivalent constant specified by S1 and the one specified by S2. The multiplied result is stored in D+3, D+2, D+1 and D. Multiplicand data Multiplier data Result × (S1+1, S1) (S2+1, S2) (D+3, D+2, D+1, D) The multiplied result is stored in the 64-bit area.
  • Page 343 High−level Instructions 16-bit data division [S1/S2 → D… (DT9015/DT90015)] (P%) Outline Divides 16-bit data by the divisor. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instructions are not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F 32 (% ) F32 % , DT 10 , DT 20 , DT 30 16-bit equivalent constant or 16-bit area (for dividend)
  • Page 344 High−level Instructions Explanation of example Divides the contents of data register DT10 by decimal constant DT20 when trigger R0 turns on. The quotient is stored in data register DT30 and the remainder is stored in special data register DT9015/DT90015. When the decimal number 15 is in DT10 and the decimal number 4 is in DT20, as shown below. Dividend [S1]: K15 Bit position ·...
  • Page 345 High−level Instructions 32-bit data division (D%) [(S1+1, S1)/(S2+1, S2) → (D+1, D)…(DT9016, DT9015)/ (DT90016, DT90015)] (PD%) Outline Divides 32-bit data by the divisor. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P33 (PD%)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction...
  • Page 346 High−level Instructions Explanation of example Higher 16 bits Lower 16 bits Contents of Contents of DT10 DT11 ÷ (Division) Contents of Contents of DT21 DT20 ← Quotient is stored in DT31 and DT30. To DT31 To DT30 ← The lower 16 bits of the remainder is stored in DT9015/DT90015 and the higher 16 bits of the remainder is stored in DT9016/DT90016.
  • Page 347 High−level Instructions (*W) 16-bit data multiplication (result in 16 bits) (P*W) Outline Multiplies two 16-bit data items and stores the result in the specified 16-bit area. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P34 (P*W)” is not available. Program example Boolean Ladder Diagram Ladder Diagram...
  • Page 348 High−level Instructions Description Multiplies the 16-bit data or 16-bit equivalent constant specified by S1 and the 16-bit data or 16-bit equivalent constant specified by S2 when the trigger turns on. The multiplied result is stored in D (16-bit area). Multiplicand data Multiplier data Trigger turns on Result...
  • Page 349 High−level Instructions (+1) 16-bit data increment [D + 1 → D] (P+1) Outline Adds 1 to 16-bit data. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P35 (P+1)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F 35 (+1)
  • Page 350 High−level Instructions Precautions during programming If the result of an arithmetic operation instruction does not fall within the range of values which can be handled, an overflow will result. Under normal circumstances, do not allow an overflow to occur. If the operation result accidentally overflows, use of the F36 (D+1) instruction (32-bit data increment) is recommended.
  • Page 351 High−level Instructions (D+1) 32-bit data increment [(D + 1, D) + 1 → (D + 1, D)] (PD+1) Outline Adds 1 to 32-bit data. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P36 (PD+1)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address...
  • Page 352 High−level Instructions Description Adds 1 to the 32-bit data specified by D. The result is stored in D+1 and D. Original data Result (D+1, D) (D+1, D) Precautions during programming If the result of an arithmetic operation instruction does not fall within the range of values which can be handled, an overflow will result.
  • Page 353 High−level Instructions (−1) 16-bit data decrement [D − 1 → D] (P−1) Outline Subtracts 1 from 16-bit data. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instructions are not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F 37 (−1 ) F37 −1 , DT 0 16-bit area to be decreased by 1...
  • Page 354 High−level Instructions Precautions during programming If the result of an arithmetic operation instruction does not fall within the range of values which can be handled, an underflow will result. Under normal circumstances, do not allow an underflow to occur. If the operation result accidentally underflows, use of the F38 (D−1) instruction (32-bit data decrement) is recommended.
  • Page 355 High−level Instructions (D−1) 32-bit data decrement [(D+1, D) − 1 → (D+1, D)] (PD−1) Outline Subtracts 1 from 32-bit data. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P38 (PD−1)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger...
  • Page 356 High−level Instructions Description Subtracts 1 from the 32-bit data specified by D. The result is stored in D+1 and D. Original data Result (D+1, D) − (D+1, D) Precautions during programming If the result of an arithmetic operation instruction does not fall within the range of values which can be handled, an underflow will result.
  • Page 357 High−level Instructions (D*D) 32-bit data multiplication (result in 32 bits) (PD*D) Outline Multiplies two 32-bit data items and stores the result in the specified 32-bit area. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P39 (PD*D)” is not available. Program example Boolean Ladder Diagram Ladder Diagram...
  • Page 358 High−level Instructions Description Multiplies the 32-bit data or 32-bit equivalent constant specified by S1 and the one specified by S2 when the trigger turns on. The multiplied result is stored in D+1 and D (32-bit area). Multiplicand data Multiplier data Trigger turns on Result (32-bit) lower 16-bit...
  • Page 359 High−level Instructions (B+) 4-digit BCD data addition [D + S → D] (PB+) Outline Adds two BCD data items that express 8-digit decimal numbers (8-digit BCD H codes). For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P40 (PB+)” is not available. Program example Boolean Ladder Diagram...
  • Page 360 High−level Instructions Explanation of example The contents of data register DT10 and data register DT1 are added together when trigger R0 turns on. When H4 (BCD)is in DT1 and H8 (BCD) is in DT10, as shown below. Augend [D]: H8 (BCD) Bit position ·...
  • Page 361 High−level Instructions (DB+) 8-digit BCD data addition [(D+1, D) + (S+1, S) → (D+1, D)] (PDB+) Outline Adds two BCD data items that express 8-digit decimal numbers (8-digit BCD H codes). For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P41 (PDB+)” is not available. Program example Boolean Ladder Diagram...
  • Page 362 High−level Instructions Explanation of example The contents of data registers DT11 and DT10 and the contents of data registers DT1 and DT0 are added together when trigger R0 turns on. Higher 16 bits Lower 16 bits The specified data area and the Contents of Contents of following data area are handled...
  • Page 363 High−level Instructions (B+) 4-digit BCD data addition [S1 + S2 → D] (PB+) Outline Adds two BCD data items that express 4-digit decimal numbers (4-digit BCD H codes) and stores the result in the specified area. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P42 (PB+)”...
  • Page 364 High−level Instructions Explanation of example The contents of data register DT10 and data register DT20 are added to gether when trigger R0 turns on. The added result is stored in data register DT30. When H (BCD) 8 is in DT10 and H (BCD) 4 is in DT20, as shown below. Augend [S1]: H8 (BCD) Bit position ·...
  • Page 365 High−level Instructions (DB+) 8-digit BCD data addition [(S1+1, S1) + (S2+1, S2) → (D+1, D)] (PDB+) Outline Adds two BCD data items that express 8-digit decimal numbers (8-digit BCD H codes) and stores the result in the specified area. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P43 (PDB+)”...
  • Page 366 High−level Instructions Explanation of example The contents of data registers DT11 and DT10 and the contents of data registers DT21 and DT20 are added together when trigger R0 turns on. The added result is stored in data registers DT31 and DT30. Higher 16 bits Lower 16 bits The specified data area and the...
  • Page 367 High−level Instructions (B−) 4-digit BCD data subtraction [D − S → D] (PB−) Outline Subtracts one BCD data item that expresses a 4-digit decimal number (4-digit BCD H codes) from another (minuend). For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P45 (PB−)”...
  • Page 368 High−level Instructions Description Subtracts the 4-digit BCD equivalent constant or 16-bit area for 4-digit BCD data specified by S from the 16-bit area for 4-digit BCD data specified by D. Minuend data Subtrahend data Result − Precautions during programming If the result of an arithmetic operation instruction does not fall within the range of values which can be handled, an underflow will result.
  • Page 369 High−level Instructions (DB−) 8-digit BCD data subtraction [(D+1, D) − (S+1, S) → (D+1, D)] (PDB−) Outline Subtracts one BCD data item that expresses an 8-digit decimal number (8-digit BCD H code) from another (minuend). For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P46 (PDB−)”...
  • Page 370 High−level Instructions Explanation of example Subtracts the contents of data registers DT11 and DT10 from the contents of data registers DT21 and DT20 when trigger R0 turns on. Higher 16 bits Lower 16 bits The specified data area and the Contents of Contents of following data area are handled...
  • Page 371 High−level Instructions (B−) 4-digit BCD data subtraction [S1 − S2 → D] (PB−) Outline Subtracts one BCD data item that expresses a 4-digit decimal number (4-digit BCD H code) from another (minuend) and stores the result in the specified area. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P47 (PB−)”...
  • Page 372 High−level Instructions Explanation of example Subtracts the contents of data register DT20 from the contents of data register DT10 when trigger R0 turns on. The subtracted result is stored in data register DT30. When H (BCD) 16 is in DT10 and H (BCD) 4 is in DT20, as shown below. Minuend [S1]: H16 (BCD) Bit position ·...
  • Page 373 High−level Instructions (DB−) 8-digit BCD data subtraction [(S1+1, S1) − (S2+1, S2) → (D+1, D)] (PDB−) Outline Subtracts one BCD data item that expresses an 8-digit decimal number (8-digit BCD H code) from another (minuend) and stores the result in the specified area.
  • Page 374 High−level Instructions Explanation of example Subtracts the contents of data registers DT21 and DT20 from the contents of data registers DT11 and DT10 when trigger R0 turns on. The subtracted result is stored in data registers DT31 and DT30. Higher 16 bits Lower 16 bits The specified data area and the Contents of...
  • Page 375 High−level Instructions (B*) 4-digit BCD data multiplication [S1 × S2 → (D+1, D)] (PB*) Outline Multiplies two BCD data items that express 4-digit decimal numbers (4-digit BCD H codes). For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P50 (PB*)” is not available. Program example Boolean Ladder Diagram...
  • Page 376 High−level Instructions Explanation of example When H (BCD) 8 is in DT10 and H (BCD) 2 is in DT20, as shown below. Multiplicand [S1]: H8 (BCD) Bit position · · · · · · · · · 0 0 0 0 0 0 0 0 0 1 0 0...
  • Page 377 High−level Instructions 8-digit BCD data multiplication [(S1+1, S1) × (S2+1, S2) → (D+3, D+2, D+1, D)] (PDB Outline Multiplies two BCD data items that express 8-digit decimal numbers (8-digit BCD H codes). For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P51 (PDB*)”...
  • Page 378 High−level Instructions Explanation of example 16 bits 16 bits The specified data area and the following data area are handled together as 32−bit data. Contents of Contents of DT11 DT10 16 bits 16 bits Contents of Contents of DT21 DT20 16 bits 16 bits 16 bits...
  • Page 379 High−level Instructions (B%) 4-digit BCD data division [S1/S2 → D… (DT9015) or (DT90015)] (PB%) Outline Divides one BCD data item that expresses a 4-digit decimal number (4-digit BCD H code) by another (divisor). For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P52 (PB%)”...
  • Page 380 High−level Instructions Explanation of example Divides the contents of data register DT10 by the contents of data register DT20 when trigger R0 turns on. The quotient is stored in data register DT30 and the remainder is stored in special data register DT9015 (DT90015 for FP2/FP2SH/FP10SH).
  • Page 381 High−level Instructions 8-digit BCD data division (DB%) [(S1+1, S1)/(S2+1, S2) → (D+1, D)… (DT9016, DT9015) or (DT90016, DT90015)] (PDB%) Outline Divides one BCD data item that expresses an 8-digit decimal number (8-digit BCD H code) by another (divisor). For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P53 (PDB%)”...
  • Page 382 High−level Instructions Explanation of example Higher 16 bits Lower 16 bits Contents of Contents of DT10 ÷ DT11 (Division) Contents of Contents of DT21 DT20 ← Quotient is stored in DT31 and DT30. To DT31 To DT30 ← The lower 16 bits of the remainder is stored in DT9015/DT90015 and the higher 16 bits of the remainder is stored in DT9016/DT90016.
  • Page 383 High−level Instructions (B+1) 4-digit BCD data increment [D + 1 → D] (PB+1) Outline Adds 1 to BCD data that expresses a 4-digit decimal number (4-digit BCD H code). For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P55 (PB+1)” is not available. Program example Boolean Ladder Diagram...
  • Page 384 High−level Instructions Description Adds 1 to the 4-digit BCD data specified by D. The result is stored in D. Original data Result Precautions during programming If the result of an arithmetic operation instruction does not fall within the range of values which can be handled, an overflow will result.
  • Page 385 High−level Instructions (DB+1) 8-digit BCD data increment [(D+1, D) + 1 → (D+1, D)] (PDB+1) Outline Adds 1 to BCD data that expresses an 8-digit decimal number (8-digit BCD H code). For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P56 (PDB+1)” is not available. Program example Boolean Ladder Diagram...
  • Page 386 High−level Instructions Description Adds 1 to the 8-digit BCD data specified by D. The result is stored in D+1 and D. Original data Result (D+1, D) (D+1, D) Precautions during programming If the result of an arithmetic operation instruction does not fall within the range of values which can be handled, an overflow will result.
  • Page 387 High−level Instructions (B−1) 4-digit BCD data decrement [D − 1 → D] (PB−1) Outline Subtracts 1 from BCD data that expresses a 4-digit decimal number (4-digit BCD H code). For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P57 (PB−1)” is not available. Program example Boolean Ladder Diagram...
  • Page 388 High−level Instructions Description Subtracts 1 from the 4-digit BCD data specified by D. The result is stored in D. Original data Result − Precautions during programming If the result of an arithmetic operation instruction does not fall within the range of values which can be handled, an underflow will result.
  • Page 389 High−level Instructions (DB−1) 8-digit BCD data decrement [(D+1, D) − 1 → (D+1, D)] (PDB−1) Outline Subtracts 1 from BCD data that expresses an 8-digit decimal number (8-digit BCD H code). For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P58 (PDB−1)” is not available. Program example Boolean Ladder Diagram...
  • Page 390 High−level Instructions Description Subtracts 1 from the 8-digit BCD data specified by D. The result is stored in D+1 and D. Original data Result (D+1, D) − (D+1, D) Precautions during programming If the result of an arithmetic operation instruction does not fall within the range of values which can be handled, an underflow will result.
  • Page 391 High−level Instructions (CMP) 16-bit data comparison (PCMP) Outline The two specified 16−bit data are compared and the result is output to the special internal relay. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P60 (PCMP)” is not available. Program example Boolean Ladder Diagram Ladder Diagram...
  • Page 392 High−level Instructions Explanation of example Compares decimal constant K100 with the contents of data register DT0 when trigger R0 turns on. When DT0 > K100, R900A turns on and external output relay Y10 turns on. When DT0 = K100, R900B turns on and external output relay Y11 turns on. When DT0 <...
  • Page 393 High−level Instructions Precautions when using two or more comparison instructions The comparison instruction flags R900A to R900C are updated with each execution of the comparison instruction. If you use two or more comparison instructions in your program, be sure to use the flags immediately after each comparison instruction, by employing output relays or internal relays.
  • Page 394 High−level Instructions Precautions when comparing BCD or external data When comparing special data, such as BCD or unsigned binary (0 to FFFF), construct your program as shown in the program example below, using special internal relays R900B and R9009. Example: Compares BCD data in DT0 and DT1.
  • Page 395 High−level Instructions (DCMP) 32-bit data comparison (PDCMP) Outline The two specified 32−bit data are compared and the result is output to the special internal relay. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P61 (PDCMP)” is not available. Program example Boolean Ladder Diagram Ladder Diagram...
  • Page 396 High−level Instructions Explanation of example Compares the content (32−bit data) of data registers DT11 and DT10 with the content (32−bit data) of data registers DT1 and DT0 when trigger R0 turns on. When (DT1 and DT0) > (DT11 and DT10), R900A turns on and external output relay Y10 turns on. When (DT1 and DT0) = (DT11 and DT10), R900B turns on and external output relay Y11 turns on.
  • Page 397 High−level Instructions Precautions when using two or more comparison instructions The comparison instruction flags R900A to R900C are updated with each execution of the comparison instruction. If you use two or more comparison instructions in your program, be sure to use the flags immediately after each comparison instruction, by employing output relays or internal relays.
  • Page 398 High−level Instructions Precautions when comparing BCD or external data When comparing special data, such as BCD or unsigned binary (0 to FFFFFFFF), flags R9009, R900A, R900B, and R900C work as shown in the table below. In this case, construct your program as shown in the program example below, using special internal relays R900B and R9009.
  • Page 399 High−level Instructions (WIN) 16-bit data band comparison (PWIN) Outline Compares one 16-bit data item with the data band specified by two other 16-bit data items and the comparison result is output to the special internal relay. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P62 (PWIN)”...
  • Page 400 High−level Instructions Explanation of example Compares the contents of data register DT10 with the contents of data register DT20 (lower limit of the data band) and data register DT30 (upper limit of the data band) when trigger R0 turns on. Example: When K−500 is in DT20 and K500 is in DT30, as shown below.
  • Page 401 High−level Instructions (DWIN) 32-bit data band comparison (PDWIN) Outline Compares one 32-bit data item with the data band specified by two other 32-bit data items and the comparison result is output to the special internal relay. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P63 (PDWIN)”...
  • Page 402 High−level Instructions Explanation of example Compares the contents of data registers DT11 and DT10 with the contents of data registers DT21 and DT20 (lower limit of the data band) and data registers DT31 and DT30 (upper limit of the data band), when trigger R0 turns on.
  • Page 403 High−level Instructions (BCMP) Block data comparison (PBCMP) Outline Compares one specified data block with another in byte units. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P64 (PBCMP)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F 64 (BCMP)
  • Page 404 High−level Instructions Explanation of example Compares the data block of data register DT10 (4 bytes from DT10 lower order byte) with data register DT20 (4 bytes from DT20 higher order byte) according to the comparison condition in data register DT0 when trigger R0 turns on.
  • Page 405 High−level Instructions Flag conditions ・Error flag (R9007): Turns on and stays on when: ・Error flag (R9008): Turns on for an instant when: − The area specified using the index modifier exceeds the limit. − The data specified by S1 is not BCD data. −...
  • Page 406 High−level Instructions 3 − 142 Phone: 800.894.0412 - Fax: 888.723.4773 - Web: www.clrwtr.com - Email: info@clrwtr.com...
  • Page 407 High−level Instructions (WAN) 16-bit data AND (PWAN) Outline Performs bit-wise AND operation on two 16-bit data items. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level ainstruction “P65 (PWAN)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F 65 (WAN) F65 WAN , DT10 , DT 20, DT30...
  • Page 408 High−level Instructions Description Performs AND operation on each bit in the 16-bit equivalent constant or 16-bit data specified by S1 and S2. The AND operation result is stored in the 16-bit area specified by D. (S1) (S2) → (D) You can use this instruction to turn off certain bits of the 16-bit data. AND operation The AND operation is shown below.
  • Page 409 High−level Instructions (WOR) 16-bit data OR (PWOR) Outline Performs bit-wise OR operation on two 16-bit data items. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P66 (PWOR)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F 66 (WOR) F66 WOR , DT10 , DT20 , DT30...
  • Page 410 High−level Instructions Description Performs OR operation on each bit in the 16-bit equivalent constant or 16-bit data specified by S1 and S2. The OR operation result is stored in the 16-bit area specified by D. (S1) (S2) → (D) You can use this instruction to turn on certain bits of the 16-bit data. OR operation The OR operation is shown below.
  • Page 411 High−level Instruct